Semiconductor Power Grid Layout With Staggered TSVs for Lower IR Drop
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Solution Overview
Problem
The existing power grid structures in integrated circuits (ICs) face challenges due to the competition between power grid components and signal wiring, leading to potential IR drops and reduced efficiency, as some positions intended for VDD or VSS vias are occupied by conductive vias, causing uneven distribution and increased IR drops.
Innovation Solution
The power grid structure incorporates a staggering arrangement of through vias and the use of connecting members or bridging vias to distribute power and ground signals efficiently, ensuring that power grid components do not interfere with signal wiring, thereby reducing IR drops and improving overall performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If power grid components (VDD/VSS vias) are placed in standard grid positions, then power distribution is simplified, but signal wiring may be blocked and IR drops increase
Solution Approach 1:
The patent applies asymmetry by staggering the positions of VDD vias and VSS vias in an alternating pattern rather than placing them in symmetric grid positions. This asymmetric arrangement allows signal wiring to route between the alternating via pairs without being blocked, while still providing adequate power distribution to circuit components.
Solution Approach 2:
The patent transitions from a two-dimensional grid layout to a three-dimensional stacked arrangement by placing through-silicon vias (TSVs) at different vertical levels. This dimensional change allows power grid components to occupy different z-heights, enabling signal wiring to pass through horizontal spaces between via stacks without interference.
2Reliability
If conductive vias are used to connect power rails, then power distribution is achieved, but signal wiring positions are occupied and IR drops increase
Solution Approach 1:
The patent segments the power distribution network into multiple independent via pairs, each serving specific power rails. By dividing the via placement into discrete alternating units (VDD via, VSS via, VDD via, VSS via), the design achieves flexible connectivity while maintaining manageable complexity through repetitive modular patterns.
Solution Approach 2:
The patent introduces alternating via pairs as intermediary structures that mediate between power rails and signal wiring. These via pairs act as intermediate connection points that enable power distribution while creating vertical and horizontal spaces that facilitate signal routing without direct interference.
3Reliability
If through vias are densely arranged for better power distribution, then IR drops are reduced, but manufacturing precision requirements increase
Solution Approach 1:
The asymmetric alternating arrangement of VDD and VSS vias creates a regular repeating pattern that simplifies manufacturing alignment. The consistent alternating sequence provides self-aligning features that reduce the need for high-precision absolute positioning, as long as the relative spacing and alternation pattern are maintained.
Solution Approach 2:
The patent applies local quality by varying the specific via positions and types (VDD vs VSS) at different locations while maintaining a consistent alternating pattern. This allows optimization of power distribution at local levels while the overall pattern provides manufacturing robustness through repetition and predictability.
Data Source
AI summary
A semiconductor devices includes a substrate, a power grid structure, and a through via penetrating the substrate. The power grid structure includes: first and second rails extending along a first direction, a conductive wire, a third rail, a conductive via, and a connecting member. The conductive wire is between the first and second rails, and extends along the first direction. The third rail is below the first rail, the second rail and the conductive wire, and extends along a second direction perpendicular to the first direction. The conductive via is between and electrically couples the conductive wire to the third rail. The connecting member is between and electrically couples the first rail to the conductive wire. The through via extends through the substrate and along a third direction perpendicular to the first direction and the second direction. The through via is disposed on and coupled to the conductive wire.