Power Hold-Off Circuit for Abrupt Power Loss in Memory Devices
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Solution Overview
Problem
Existing power management systems for memory devices, particularly in low form factor devices like BGA and automotive applications, face challenges with complex and expensive capacitor designs that are necessary for power hold-off during abrupt power loss events, leading to excessive noise and high costs.
Innovation Solution
A power hold-off circuit comprising a step-up regulator, a step-down regulator, and power hold-off capacitors, with a switch that connects to the battery when voltage is sufficient and to the step-down regulator during power loss, ensuring power is supplied only to critical components during an abrupt power loss event.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex capacitor designs are used for power hold-off during abrupt power loss events, then power hold-off capability is improved, but device complexity and cost increase
Solution Approach 1:
The power hold-off circuit is segmented into multiple functional blocks: a switch component for detecting power loss conditions, a first regulator component for voltage regulation, and a second regulator component for capacitive loading control. Each component performs a specific function, reducing overall design complexity while maintaining power hold-off capability.
Solution Approach 2:
The patent introduces intermediary components such as the switch component that mediates between the power source and the capacitive load, and regulator components that act as intermediaries to control voltage transitions. These intermediaries enable power hold-off functionality without requiring complex direct capacitor designs.
2Duration of action of stationary object
If large capacitors are used for power hold-off, then power hold-off duration is improved, but electromagnetic interference and noise increase
Solution Approach 1:
The patent employs dynamic control through the switch component that responds to power loss conditions, and regulator components that adjust voltage levels in real-time. This dynamic approach enables power hold-off duration control without requiring fixed large capacitor values, thereby reducing electromagnetic interference and noise.
Solution Approach 2:
The patent changes the parameter of capacitive loading dynamically through the second regulator component, which controls the capacitive load based on detected power loss conditions. This allows the system to achieve adequate power hold-off duration while using smaller capacitors, thus minimizing electromagnetic interference and noise generation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides efficient power management with reduced complexity and cost, enabling emergency data storage in critical components like SSDs while minimizing electromagnetic interference and noise, thus optimizing power hold-off in low form factor devices.
Implementation Method 1
a step-up regulator configured to charge the power hold-off capacitors based on the detected power loss condition
Implementation Method 2
one or more power hold-off capacitors configured to supply power to at least a portion of the memory device during the abrupt power loss event
Implementation Method 3
a step-down regulator configured to receive power from the power hold-off capacitors and supply the power to at least a portion of the memory device during the abrupt power loss event
Data Source
AI summary
Implementations described herein relate to a power hold-off circuit and power hold-off circuit operation. In some implementations, a system may include a battery, and a power hold-off circuit. The power hold-off circuit may include a step-up regulator, an abrupt power-loss (APL) switch, and one or more power hold-off capacitors. The APL switch may be connected to the battery when a voltage from the battery satisfies a voltage threshold. The APL switch may be connected to a step-down regulator or one or more power hold-off capacitors when the voltage from the battery does not satisfy the voltage threshold.


