Power Management Circuit With Finite State Machine For Low Power Modes
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Solution Overview
Problem
Existing power management systems for portable electronic devices struggle to minimize power consumption effectively, especially in low power modes, where some components still require power to maintain functionality and quickly return to operational state, limiting battery life.
Innovation Solution
A power management circuit with a finite state machine and multiple voltage regulators, capacitors, and a low frequency oscillator that cyclically enables and disables current supply to storage capacitors, allowing controlled charging and discharging based on voltage thresholds or timing cycles to optimize power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the electrical equipment is turned off entirely when not required, then power consumption is minimized, but the equipment cannot maintain state information or quickly return to operational state
Solution Approach 1:
The patent implements periodic action by cyclically enabling and disabling the voltage regulator in low power mode. The regulator operates during defined time periods to charge storage capacitors, then disables to conserve power. This periodic charging maintains sufficient voltage levels in capacitors to sustain analog and digital circuitry operation without continuous regulator activation, thus minimizing power consumption while preserving functionality.
2Reliability
If voltage regulators continuously supply current to storage capacitors, then components can maintain functionality, but power consumption increases
Solution Approach 1:
The patent applies preliminary action by charging the storage capacitors in advance during active periods before the voltage regulator is disabled. The regulator supplies current to charge capacitors to sufficient voltage levels while the system is fully operational, preparing energy reserves that allow analog and digital circuitry to continue functioning during subsequent low power periods without continuous regulator operation.
Solution Approach 2:
The voltage regulator operates periodically rather than continuously, enabling during defined time periods to charge storage capacitors and disabling during intervals to conserve power. This periodic operation maintains capacitor voltage levels sufficient for circuitry functionality while dramatically reducing average power consumption compared to continuous regulator operation.
3Use of energy by moving object
If the device switches between fully on and sleep modes, then power management is improved, but the transition time and power spikes increase
Solution Approach 1:
The patent applies preliminary action by maintaining charged storage capacitors during low power mode, so when the system needs to wake from sleep mode, the capacitors can immediately supply current to support rapid reactivation of analog and digital circuitry. This pre-charged energy reservoir eliminates the need for lengthy power-up sequences or high power spikes during mode transitions.
Solution Approach 2:
The storage capacitors serve as an intermediary energy buffer between the voltage regulator and the load circuitry. During mode transitions, the capacitors mediate by supplying or absorbing current, isolating the regulator from rapid load changes and enabling smooth, fast transitions between power modes without direct regulator intervention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces power consumption by managing the duration of charging cycles, allowing devices to maintain functionality in low power modes while extending battery life through efficient power management.
Implementation Method 1
A first storage capacitive element is coupled to the charging input and configured to be charged by the charge voltage
Data Source
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AI summary
Power management circuits and methods of operation are described. A power management circuit includes an electrical power input for receiving electrical power from a power source, a controller, a finite state machine circuit in communication with the controller and a first voltage regulator in communication with the controller and the electrical power input and having a first output connected to a first capacitor for storing electrical power and to first electrical circuitry. The controller is configured to cyclically enable the first voltage regulator to supply current to charge the first capacitor. The finite state machine circuit is configured to interact with the controller to control the duration of a first time period of a cycle over which the first voltage regulator supplies current to charge the first capacitor and to control the duration of a second time period of the cycle over which the first voltage regulator does not supply current to charge the first capacitor and during which electrical current is receivable by said first electrical circuitry from said first capacitor