Power Management Circuits for Nonvolatile Memory Arrays

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Solution Overview

Problem

In non-volatile memory systems, managing power distribution to multiple memory dies effectively is challenging due to limited current availability from hosts, leading to voltage drops that can cause power-down conditions and affect system operation.

Innovation Solution

Implementing multiple power management circuits that operate in different modes, with a power coordination circuit determining appropriate modes to balance power consumption and maintain aggregate power within limits, ensuring stable voltage supply to memory dies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple memory dies are connected to share a common power supply, then the system capacity and functionality are improved, but voltage drops occur due to limited current availability from hosts

Engineering Contradiction:
Improvenumber of memory diesVSAvoidvoltage stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent divides the memory system into multiple independent power domains, with each power management circuit serving a specific subset of memory dies. This segmentation isolates power fluctuations to individual banks, preventing system-wide voltage drops and improving overall reliability when multiple memory dies are operated simultaneously.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If a single power management circuit supplies power to all memory dies, then the device complexity is reduced, but power fluctuations affect the entire memory system

Engineering Contradiction:
Improvepower management structureVSAvoidsystem operation stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements multiple power management circuits that independently manage power to different memory die banks. This segmentation ensures that power fluctuations in one bank do not propagate to other banks, maintaining system operation stability while managing the complexity through modular power management architecture.

Inventive Principle:
Principle #1Segmentation

3Productivity

If power management circuits operate in high-power mode to support memory operations, then operational performance is improved, but aggregate power consumption exceeds available current limits

Engineering Contradiction:
Improvememory operation speedVSAvoidaggregate power consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent employs dynamic power management where each power management circuit can independently switch between high-power and low-power modes based on operational requirements. The power coordination circuit monitors aggregate power consumption and dynamically adjusts individual circuit modes to maintain productivity while staying within current limits from the host.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the power consumption parameter of individual power management circuits based on operational needs. By adjusting power modes dynamically, the system can achieve high-speed memory operations when needed while reducing aggregate power consumption to match available current limits, thus resolving the contradiction between productivity and energy usage.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9123400B1Power management for nonvolatile memory array
Publication Date: 2015.09.01 SANDISK TECHNOLOGIES LLC
  • US9123400B1 patent drawing
  • US9123400B1 patent drawing
  • US9123400B1 patent drawing

AI summary

In a nonvolatile memory array, power is provided to groups of memory dies by power management circuits that have different power modes. While one power management circuit is in a high-power mode supplying power for power-hungry memory operations, another power management circuit is in a low-power mode so that overall power usage is balanced.