Power Management Circuit for Storage Devices

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Solution Overview

Problem

Existing storage devices face challenges in maintaining operational performance of memories due to difficulties in voltage adjustment based on the operation status of the memory or controller, leading to inefficiencies in voltage supply.

Innovation Solution

A power management circuit that adjusts driving voltages based on operation timing and status information received from the controller, using a voltage adjuster to output operation correction voltages that adapt to read and write operations, ensuring efficient voltage supply to memories.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a reference voltage is inputted from the outside to maintain voltage efficiency, then voltage supply efficiency is improved, but operational performance of the memory degrades due to difficulties in voltage adjustment

Engineering Contradiction:
Improvevoltage supply efficiencyVSAvoidoperational performance
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The power management circuit dynamically adjusts the reference voltage based on operation timing information received from the controller. The circuit switches between different reference voltages (first reference voltage for read operations, second reference voltage for write operations) to optimize both voltage supply efficiency and operational performance according to the current operation mode.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter by selecting different reference voltages based on operation type. The power management circuit adjusts the reference voltage level according to whether the memory is performing read or write operations, thereby optimizing the balance between power efficiency and operational performance for each specific operation mode.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If voltage is adjusted according to operation status to improve operational performance, then memory performance is improved, but voltage supply efficiency decreases

Engineering Contradiction:
Improveoperational performanceVSAvoidvoltage supply efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The power management circuit applies different reference voltages to different operation modes. Instead of using a single fixed reference voltage, the circuit locally optimizes the voltage level for read operations (using first reference voltage) and write operations (using second reference voltage), thereby improving operational performance while maintaining voltage supply efficiency for each specific operation type.

Inventive Principle:
Principle #3Local quality

3Reliability

If multiple voltage levels are provided for different operations, then operational performance is improved, but device complexity increases

Engineering Contradiction:
Improveoperational performanceVSAvoidpower management circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The power management circuit is designed as a universal module that handles multiple operation modes (read and write) through a single integrated structure. The circuit uses operation timing information from the controller to automatically select appropriate reference voltages, providing multi-functional voltage management without requiring separate dedicated circuits for each operation mode, thus limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250210088A1Power management circuit and storage device
Publication Date: 2025.06.26 SK HYNIX INC
  • US20250210088A1 patent drawing
  • US20250210088A1 patent drawing
  • US20250210088A1 patent drawing

AI summary

A power management circuit that supplies a voltage for driving a memory outputs, to the memory, a voltage that is adjusted on the basis of a driving reference voltage inputted from the outside and operation timing information and operation status information of the memory received from a controller. Therefore, it is possible to improve the performance of the memory that operates using a voltage supplied from the power management circuit while maintaining voltage supply efficiency.