Power Metering Circuit With Notch Filtering for Ripple-Free AC Power
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Solution Overview
Problem
Conventional power metering systems experience jitter issues due to the 2ω component remaining after low-pass filtering, which affects the stability of active and reactive power measurements when a PWM output is applied.
Innovation Solution
A power metering circuit that includes a notch filter with a stop band based on the line frequency, along with a control circuit to set the sampling frequency of ADCs to a multiple of the line frequency, using a phase-locked loop or programmable oscillator to track and adjust the line frequency, effectively removing the 2ω component.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a low-pass filter is applied to extract DC information from instantaneous power, then active and reactive power can be measured, but the 2ω component creates large jitters in PWM output
Solution Approach 1:
The patent extracts and removes the specific 2ω component from the instantaneous power signal using a notch filter tuned to the double line frequency. This targeted extraction eliminates the harmful ripple while preserving the DC power measurement, resolving the contradiction between measurement capability and output stability.
Solution Approach 2:
The patent introduces a notch filter as an intermediary component between the multiplier and PWM output. This intermediary selectively attenuates the 2ω component while allowing the DC component to pass through, thereby mediating between the raw instantaneous power signal and the stable PWM output requirement.
2Reliability
If a large low-pass filter is applied to remove the 2ω component, then output stability improves, but the filter size and complexity increase
Solution Approach 1:
Instead of using a large, complex low-pass filter to remove the 2ω component, the patent extracts and targets only the specific problematic frequency using a notch filter. This approach achieves the same stability improvement with minimal filter complexity by focusing on the specific 2ω frequency rather than filtering a broad range.
Solution Approach 2:
The patent changes the filtering approach from a broad low-pass characteristic to a targeted notch characteristic at the 2ω frequency. This parameter change in the filter design allows for a much smaller and simpler filter structure while achieving the same output stability improvement.
3Ease of manufacture
If the sampling frequency is not synchronized with line frequency, then ADC operation is simple, but the 2ω component cannot be effectively removed
Solution Approach 1:
The patent implements a phase-locked loop that provides feedback control to synchronize the ADC sampling frequency with the line frequency. The PLL continuously monitors the line frequency and adjusts the sampling clock accordingly, ensuring that the sampling is always synchronized with the power line, which enables effective removal of the 2ω component while maintaining simple ADC operation.
Solution Approach 2:
The patent makes the sampling frequency dynamic by using a phase-locked loop to continuously adjust it based on the actual line frequency. This dynamic synchronization ensures that the sampling rate remains locked to the line frequency, enabling effective 2ω component removal while keeping the ADC operation straightforward through automatic frequency tracking.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a ripple-free calculation block for determining active or reactive power, ensuring the output contains only the desired DC quantity, thereby improving the stability and accuracy of power metering.
Implementation Method 1
The control circuit includes a phase locked loop configured to receive one of the analog current input and the analog voltage input
Implementation Method 2
a notch filter configured to receive an output of the multiplier, the notch filter having a stop band based on a line frequency
Data Source
Figure 1~2
Figure 3
AI summary
A power metering circuit includes a current input path for receiving an analog current input at a first analog to digital converter; a voltage input path for receiving an analog voltage input at a second analog to digital converter; a multiplier configured to multiply an output of the current input path and the voltage input path; a notch filter configured to receive an output of the multiplier, the notch filter having a stop band based on a line frequency; and a control circuit for setting a sampling frequency of the first analog to digital converter and the second analog to digital converter to a multiple of the line frequency.