Power Mode Verification in Semiconductor ICs
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Solution Overview
Problem
The increasing scale and diversification of semiconductor integrated circuits demand for low power consumption pose challenges for power control systems, as the number of power modes becomes exponentially large, making thorough verification of all combinations physically difficult, leading to potential malfunctions due to insufficient verification of actual power modes used.
Innovation Solution
A semiconductor integrated circuit design support system with a partial power control mechanism, including a simulation section for simulating power control, a detection section for recording power mode information, and a check section that verifies if the examined power mode is used, outputs a check result or replaces the power mode to prevent malfunctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of power domains increases to meet diversification demands, then power control flexibility improves, but the number of power mode combinations becomes exponentially large making thorough verification physically difficult
Solution Approach 1:
The verification process is segmented into two distinct phases: (1) simulation-based verification during design where power mode transitions are simulated and examined power modes are identified, and (2) runtime verification where the power mode detection section monitors actual power modes and compares them against the examined set. This segmentation allows comprehensive verification without requiring exhaustive testing of all possible power mode combinations.
Solution Approach 2:
The power mode detection section is configured during design time with the set of examined power modes that have been verified through simulation. This preliminary configuration enables the system to perform rapid runtime verification by simply checking whether actual power modes match the pre-verified examined power modes, without requiring complex real-time analysis.
2Reliability
If verification is limited to originally required power modes, then verification effort is reduced, but malfunctions may occur when actual power modes deviate from the originally required range
Solution Approach 1:
The power mode detection section continuously monitors actual power modes and provides feedback by comparing them against the examined power modes stored in memory. When a mismatch is detected (i.e., an unexamined power mode is active), the system can trigger an interrupt or error signal, providing immediate feedback about verification failures. This feedback mechanism ensures that deviations from verified power modes are detected without requiring exhaustive pre-verification of all possible modes.
3Adaptability or versatility
If software power control is implemented to handle diverse power demands, then adaptability to different power consumption demands improves, but the risk of inconsistency between intended and actual power modes increases due to insufficient verification
Solution Approach 1:
The power mode detection section acts as an intermediary between the software power control system and the actual power mode execution. It monitors the actual power modes and compares them against the examined power modes, serving as a safety layer that detects inconsistencies without interfering with the flexibility of software-based power control. This intermediary mechanism maintains reliability while preserving adaptability.
Data Source
AI summary
A semiconductor integrated circuit design support system having a partial power control mechanism includes a partial power control simulation program configured to perform a partial power control simulation on the basis of a circuit description of the semiconductor integrated circuit and a power specifications description, a power mode transition detection program configured to detect a power mode which is run during execution of the partial power control simulation and record power mode information of an examined power mode, and a power mode transition check program configured to check whether the examined power mode recorded at the time of execution of partial power control is used and output a check result.