Power Semiconductor Module Alternating Current Paths
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Solution Overview
Problem
Power semiconductor modules face challenges in reducing wiring inductance, leading to increased surge voltage, larger module size, higher costs, and external electromagnetic interference (EMI) due to insufficient inductance reduction in existing designs.
Innovation Solution
A power semiconductor module design featuring a first and second insulation substrate with conductor patterns and semiconductor elements connected in parallel, where current paths between positive and negative power supplies are aligned alternately along the conductor pattern's periphery, allowing surge currents to flow in opposing directions and cancel magnetic flux, thereby reducing wiring inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If wiring inductance is reduced to suppress surge voltage, then surge voltage is suppressed, but module size and cost increase due to larger semiconductor elements required for high withstand voltage
Solution Approach 1:
The current path is segmented into multiple parallel paths with alternating polarity arrangements. By dividing the single current path into multiple segments arranged in parallel, the patent reduces the effective inductance while distributing the surge voltage across multiple semiconductor elements, thereby suppressing overall surge voltage without requiring oversized individual elements.
Solution Approach 2:
The patent employs asymmetric arrangement of positive and negative current paths in an alternating pattern around the conductor pattern. This asymmetric layout creates opposing magnetic fluxes that cancel each other, reducing net inductance and consequently suppressing surge voltage without increasing module size.
2Object-affected harmful factors
If wiring inductance is reduced to suppress surge voltage, then surge voltage is suppressed, but external EMI increases due to high voltage switching
Solution Approach 1:
The patent uses the counterweight principle by arranging positive and negative current paths in close proximity with alternating polarity. The magnetic fields generated by these opposing currents act as counterweights that cancel each other out, reducing net electromagnetic radiation and external EMI while suppressing surge voltage.
Solution Approach 2:
The patent converts the potentially harmful high dv/dt switching behavior into a beneficial effect by utilizing the alternating current paths to generate opposing magnetic fluxes. The rapid voltage changes that would normally cause EMI are instead used to create canceling magnetic fields, transforming the harmful switching transient into a useful flux-cancellation mechanism.
3Device complexity
If conventional current path arrangement is used, then module design is simple, but wiring inductance remains high leading to increased surge voltage
Solution Approach 1:
The patent transitions from a conventional linear or radial current path arrangement to a two-dimensional alternating pattern around the conductor pattern. By utilizing the peripheral arrangement in multiple dimensions, the patent achieves superior inductance reduction while maintaining manageable design complexity through systematic repetition of the alternating pattern.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces wiring inductance by approximately half compared to conventional arrangements, suppressing surge voltage and external EMI, and allows for a more compact and cost-effective module without the need for excessive breakdown voltage.
Implementation Method 1
a surge current flows clockwise and counterclockwise, i.e. in both directions, when viewed from the thickness direction of the substrate. Accordingly, the magnetic flux by the current will cancel each other to allow reduction in the wiring inductance
Data Source
AI summary
A power semiconductor module (1) includes a first MOS transistor (16) connected to a positive side power supply terminal via a first conductor pattern (11), a first free wheeling diode (17) connected to the positive side power supply terminal via a second conductor pattern (12), a second MOS transistor (18) connected to a negative side power supply terminal via a third conductor pattern (13), and a second free wheeling diode (19) connected to the negative side power supply terminal via a fourth conductor pattern (14). These semiconductor elements (16-19) are connected to a load side output terminal via a common fifth conductor pattern (15). The semiconductor element (16, 17) connected to the positive side power supply terminal and the semiconductor element (18, 19) connected to the negative side power supply terminal are arranged alternately, substantially linearly.