Power Module Switch Layout for Balanced Parallel Currents
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In high-capacity and high-power-density power electronics systems, paralleled power devices experience dynamic current unbalance due to asymmetrical layouts and differing parasitic inductances, leading to gate voltage oscillation, overcurrent, and thermal stress unbalance, which can cause system instability and failure.
Innovation Solution
A switch circuit and power module design that balances dynamic currents through switch bridge arms with strategically configured mutual inductances and interconnection conductors, ensuring balanced current flow by optimizing the length and inductance of power and control loops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple power devices are paralleled to increase current capability, then the current rating of the power electronics system is improved, but the dynamic current unbalance between paralleled devices causes system instability and thermal runaway
Solution Approach 1:
The patent intentionally introduces asymmetry by adding different inductance values to different paralleled switch bridge arms. Specifically, a first inductance is added to the first switch bridge arm and a second inductance is added to the second switch bridge arm, where these inductances are designed to compensate for the inherent asymmetries in parasitic inductances. This controlled asymmetry balances the total inductance (parasitic plus added) across all paralleled devices, thereby balancing dynamic currents and eliminating oscillation while maintaining high current capability.
2Power
If paralleled devices are used to achieve high power density, then the power capability is improved, but the asymmetrical layout causes different parasitic inductances leading to current unbalance
Solution Approach 1:
The patent applies local quality by adding inductance components specifically to certain switch bridge arms based on their individual parasitic inductance characteristics. Rather than uniformly treating all paralleled devices, the solution tailors the inductance addition to each device's specific needs. The first switch bridge arm receives a first inductance and the second switch bridge arm receives a second inductance, creating locally optimized current balance without requiring perfect symmetry in the overall layout.
3Device complexity
If standard paralleled switch configuration is used, then device complexity is minimized, but gate voltage oscillation and overcurrent occur due to unbalanced dynamic currents
Solution Approach 1:
The patent introduces inductance components as intermediary elements between the power source and the paralleled switches. These inductors act as mediators that smooth out current variations and prevent direct coupling of oscillations between paralleled devices. By placing inductance in series with each switch bridge arm, the solution isolates each device's switching transient from others, eliminating gate voltage oscillation and overcurrent while maintaining relatively simple switch configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively balances dynamic currents, enhancing the reliability of the switch circuit and power module by mitigating current imbalances and thermal stress, thereby preventing system instability and failure.
Implementation Method 1
A first mutual inductance is formed between the power loop and the first control loop
Data Source
AI summary
A switch circuit electrically connected to a power source and a first control source and including a plurality of switch bridge arms is provided. Each of the plurality of switch bridge arms includes a first switch and a second switch electrically connected in series. A loop formed by the first switch, the second switch and the power source is defined as a power loop. A loop formed by the first control source and the first switch is defined as a first control loop. A first mutual inductance is formed between the power loop and the first control loop. Among all the first switches, the first switch with the longer power loop has the smaller first mutual inductance.


