Power Module Layout With Balanced Conduction Paths for Lower Switching Loss
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Solution Overview
Problem
Current power module designs for vehicles face challenges due to high current and voltage requirements, efficiency constraints, size and weight limitations, electromagnetic interference, and unbalanced parasitic impedances leading to increased switching loss and component damage.
Innovation Solution
A power module design featuring a dielectric substrate with equal conduction path lengths for high-side and low-side semiconductor devices, connected via soldering or sintering, to ensure balanced impedance and reduce EMI issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional power module designs are used, then power conversion functionality is achieved, but unbalanced parasitic impedances cause increased switching loss and component damage
Solution Approach 1:
The patent applies asymmetry by intentionally designing different conduction path lengths for high-side and low-side semiconductor devices. The low-side devices have shorter conduction paths to DC negative conductors, while high-side devices have longer conduction paths to DC positive conductors. This asymmetric design compensates for the inherent voltage differences between high-side and low-side devices, balancing the parasitic impedances and reducing switching losses without causing component damage.
2Reliability
If equal conduction path lengths are implemented for all semiconductor devices, then balanced impedance is achieved, but increased device complexity and manufacturing difficulty arise
Solution Approach 1:
The patent applies local quality by optimizing conduction path lengths specifically for different device locations rather than uniformly across all devices. High-side semiconductor devices are designed with longer conduction paths to DC positive conductors, while low-side semiconductor devices have shorter conduction paths to DC negative conductors. This localized optimization achieves balanced impedance by compensating for voltage differences at specific locations without requiring complex global redesign.
3Loss of energy
If optimized conduction paths are designed, then switching loss is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary action by pre-calculating and pre-designing the optimal conduction path lengths during the design phase to compensate for expected parasitic impedance variations. The conduction paths are intentionally made asymmetric in the design stage, with low-side devices having shorter paths and high-side devices having longer paths. This preliminary compensation eliminates the need for post-manufacturing adjustments and reduces sensitivity to manufacturing tolerances.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves balanced impedance and reduced switching loss, enhancing efficiency and reliability of power conversion in vehicles.
Implementation Method 1
a dielectric substrate including a direct bonded copper (DBC) substrate or an active metal brazed (AMB) substrate
Implementation Method 2
connected via soldering or sintering
Implementation Method 3
connected via soldering or sintering
Data Source
AI summary
A power module may include a dielectric substrate and a plurality of conductors disposed on the dielectric substrate. The power module further may include a plurality of high-side semiconductor devices. A high-side conduction path length between a first terminal of each of the plurality of high-side semiconductor devices and a plurality of terminal ends of the plurality of conductors is equal. The power module further may include a plurality of low-side semiconductor devices. A low-side conduction path length between a second terminal of each of the plurality of low-side semiconductor devices and the plurality of terminal ends of the plurality of conductors is equal is equal.