Semiconductor Power Module Packages with Direct Substrate Bonding

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Solution Overview

Problem

The increasing integration density of semiconductor chips in power modules leads to a rise in the number of bonding pads and package dimensions, which contradicts the trend of miniaturization in electronic devices, necessitating a simplified structure for semiconductor power module packages.

Innovation Solution

The solution involves attaching electrodes directly to substrates, electrically coupling semiconductor chips with interconnection lines, and encapsulating them to expose the electrode surfaces, eliminating the need for a lead frame, thereby simplifying the package structure and enabling miniaturization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the integration density of semiconductor chips is increased, then the number of bonding pads and electrical connectivity is improved, but the package dimension increases

Engineering Contradiction:
Improveintegration densityVSAvoidpackage dimension
Core Design Contradiction:
Adaptability or versatilityVSLength of stationary object

Solution Approach 1:

The patent transitions from a planar lead frame structure to a three-dimensional substrate-based architecture where electrodes are vertically integrated with the substrate. This dimensional change allows multiple bonding pads and electrodes to be arranged in both planar and vertical spaces, increasing integration density without proportionally increasing the package footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts and eliminates the traditional lead frame component from the package structure. By removing the lead frame and its associated extensive lead network, the design achieves higher integration density through direct substrate-electrode-chip connections, thereby reducing the overall package dimension while maintaining electrical connectivity.

Inventive Principle:
Principle #2Taking out (Extraction)

2Adaptability or versatility

If the number of bonding pads is increased to accommodate higher integration density, then electrical connectivity is improved, but the device complexity increases

Engineering Contradiction:
Improvenumber of bonding padsVSAvoidpackage structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the functions of the lead frame and substrate into a unified substrate-electrode structure. The substrate serves as both the mechanical support and the electrical interconnection carrier, with electrodes directly formed on or integrated with the substrate. This consolidation reduces structural complexity while accommodating multiple bonding pads for high integration density.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The substrate in the patent performs multiple functions simultaneously: it provides mechanical support, electrical interconnection through integrated electrodes, and thermal management pathways. This multi-functionality allows the package to accommodate numerous bonding pads without requiring separate dedicated structures for each function, thereby reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8125080B2Semiconductor power module packages with simplified structure and methods of fabricating the same
Publication Date: 2012.02.28 SEMICON COMPONENTS IND LLC
  • US8125080B2 patent drawing
  • US8125080B2 patent drawing
  • US8125080B2 patent drawing

AI summary

Provided are semiconductor power module packages, which are structurally simplified by bonding electrodes onto substrates, and methods of fabricating the same. An exemplary package includes a substrate and semiconductor chips disposed on a top surface of the substrate. Electrodes are bonded to the top surface of the substrate and electrically coupled to the semiconductor chips. Parts of the semiconductor chips are electrically coupled to parts of the electrodes by interconnection lines. An encapsulation unit covers the semiconductor chips, the electrodes, and the interconnection lines and exposes at least top surfaces of the electrodes.