Power Module Package Structure for Dual-Sided Cooling and Isolation
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Solution Overview
Problem
Current semiconductor power device module packaging technologies face challenges in thermal management and reliability, particularly at high temperatures, which affects the performance and longevity of power devices in applications such as automotive and industrial systems.
Innovation Solution
The proposed solution involves a circuit package design with a semiconductor die thermally coupled to high voltage isolation carriers and conductive spacers, which are also thermally coupled to substrates, allowing for dual-sided cooling and improved thermal management while maintaining electrical performance. This design includes multiple semiconductor dies assembled in a single package with conductive spacers and substrates that conduct heat effectively, reducing thermal mechanical stress and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional single-sided cooling packaging is used, then manufacturing simplicity is maintained, but thermal management performance deteriorates at high power levels
Solution Approach 1:
The packaging structure is segmented into multiple independent cooling paths with separate carriers positioned on opposite sides of the semiconductor die. Each carrier provides independent heat dissipation, allowing the system to manage thermal loads more effectively without requiring a complete redesign of the packaging approach.
Solution Approach 2:
The cooling architecture transitions from a single-sided (one-dimensional) approach to a dual-sided (two-dimensional) approach by positioning carriers on both the front and back sides of the semiconductor die. This dimensional expansion enables heat to be dissipated in multiple directions simultaneously, significantly improving thermal management performance.
2Reliability
If semiconductor die is directly mounted to substrate, then manufacturing process is simplified, but electrical isolation and high voltage performance deteriorate
Solution Approach 1:
Carrier structures with integrated molding materials serve as intermediary components between the semiconductor die and the substrate. These carriers provide both mechanical support and electrical isolation, enabling high voltage performance while maintaining a manageable manufacturing process through standardized assembly procedures.
3Loss of energy
If thermal coupling to both substrates is implemented, then heat dissipation efficiency is improved, but thermal mechanical stress increases
Solution Approach 1:
Conductive spacers are strategically positioned at specific locations where thermal coupling is most effective, rather than providing uniform thermal contact across the entire die surface. This localized approach optimizes heat dissipation efficiency while minimizing the generation of thermal mechanical stress in critical areas.
Solution Approach 2:
The packaging employs composite material structures including conductive spacers with specific thermal and mechanical properties, combined with molding materials that provide both electrical isolation and mechanical compliance. These composite structures enable effective heat transfer while accommodating thermal expansion differences and reducing stress accumulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-sided cooling and thermal management system effectively addresses thermal performance issues, improving the reliability and longevity of semiconductor power devices, especially in high-voltage and high-current applications, by efficiently dissipating heat and reducing the risk of thermal deformation stress.
Implementation Method 1
the semiconductor die is positioned to conduct heat to (i.e., is thermally coupled to) the first high voltage isolation carrier
Implementation Method 2
The conductive spacer is thermally coupled to both the semiconductor die and to the second high voltage isolation carrier
Data Source
AI summary
A method includes disposing a semiconductor die between a first high voltage isolation carrier and a second high voltage isolation carrier, disposing a first molding material in a space between the semiconductor die and the first high voltage isolation carrier, and disposing a conductive spacer between the semiconductor die and the second high voltage isolation carrier. The method further includes encapsulating the first molding material and the conductive spacer with a second molding material.