Power Module Gate-Path Coupling for Faster Switching
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Solution Overview
Problem
Conventional power modules face challenges in optimizing dynamic performance without compromising manufacturability and device reliability, while also being cost-effective and size-effective, due to the use of internal gate resistors and other components that increase design complexity and costs.
Innovation Solution
The power module incorporates a power path with a primary conductive structure and two gate paths with secondary conductive structures, utilizing parasitic mutual coupling to enhance dynamic performance, with symmetrical mutual coupling between secondary and primary parasitic inductors, optimizing switching speed and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If internal gate resistors and other components are utilized to control the dynamic performance of semiconductor switching devices, then the dynamic performance can be optimized, but the design challenge for manufacturability and device reliability increases, and the final cost and footprint increase
Solution Approach 1:
The patent converts the harmful parasitic inductance, which traditionally degrades switching performance, into a beneficial element by utilizing mutual coupling between parasitic inductors to achieve active gate resistance effect. This eliminates the need for separate gate resistance components while improving switching speed and reducing oscillations.
Solution Approach 2:
The parasitic inductors in the power path and gate path serve dual purposes: their inherent parasitic property is transformed into a useful function through mutual coupling, where the parasitic inductance itself provides the gate resistance effect without requiring external components.
2Speed
If internal gate resistors and other components are utilized to control the dynamic performance of semiconductor switching devices, then the dynamic performance can be optimized, but the final cost and footprint increase
Solution Approach 1:
The patent converts the harmful parasitic inductance, which traditionally degrades switching performance, into a beneficial element by utilizing mutual coupling between parasitic inductors to achieve active gate resistance effect. This eliminates the need for separate gate resistance components while improving switching speed and reducing oscillations.
Solution Approach 2:
The patent merges the function of gate resistance into the existing parasitic inductors of the power path and gate path, eliminating the need for separate components. The mutual coupling between parasitic inductors provides the gate resistance effect, simplifying the overall device structure and manufacturing process.
3Speed
If conventional components are used to control dynamic performance, then switching speed can be managed, but the negative effects on switching speed and performance occur
Solution Approach 1:
The patent converts the harmful parasitic inductance, which traditionally degrades switching performance, into a beneficial element by utilizing mutual coupling between parasitic inductors to achieve active gate resistance effect. This eliminates the need for separate gate resistance components while improving switching speed and reducing oscillations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves switching speed and reliability while maintaining manufacturability and cost-effectiveness by leveraging parasitic mutual coupling, reducing the negative effects on switching speed and enhancing performance.
Implementation Method 1
a primary parasitic inductor exists within the power path due to a geometric configuration of the primary conductive structure, a first secondary parasitic inductor exists within the first gate path due to a geometric configuration of the first secondary conductive structure, and a second secondary parasitic inductor exists within the second gate path due to a geometric configuration of the second secondary conductive structure. The first secondary conductive structure and the second secondary conductive structure are configured such that mutual coupling between the first secondary parasitic inductor and the primary parasitic inductor and mutual coupling between the second secondary parasitic inductor and the primary parasitic inductor are substantially symmetrical.
Data Source
AI summary
The present disclosure relates to a power module with a power path extending through a first field-effect transistor (FET) and a second FET. A primary conductive structure connecting the first FET and the second FET in series provides a primary parasitic inductor within the power path. A first secondary conductive structure connected to both a gate and a source of the first FET provides a first secondary parasitic inductor within a first gate path, and a second secondary conductive structure connected to both a gate and a source of the second FET provides a second secondary parasitic inductor within a second gate path. The first secondary conductive structure and the second secondary conductive structure are configured such that mutual coupling between the first secondary parasitic inductor and the primary parasitic inductor and mutual coupling between the second secondary parasitic inductor and the primary parasitic inductor are substantially symmetrical.