Low-Inductance Power Module Gate Driving for Short-Circuit Withstand

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Solution Overview

Problem

Low-inductance power modules, particularly those using wide-bandgap semiconductors like SiC MOSFETs, face challenges in withstanding short circuits due to rapid switching, leading to overheating and degradation, as existing short-circuit monitoring circuits struggle to manage high current overshoots and peak loads during switching events.

Innovation Solution

A driver circuit that operates in two modes, generating different gate-source voltages to manage short circuits by reducing gate-source voltage during detection and initiating shutdown, and using reversible inductance to mitigate current peaks, maintaining efficient switching performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If low-inductance power modules use thin chips to achieve superior switching performance, then switching losses are reduced and switching speed is improved, but thermal capacity is reduced and short circuit withstand time is shortened

Engineering Contradiction:
Improveswitching speedVSAvoidshort circuit withstand time
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The driver circuit dynamically adjusts the gate-source voltage based on operating conditions. During normal operation, it applies high gate-source voltage for optimal switching performance. During short circuit conditions, it reduces the gate-source voltage to limit current and extend withstand time, thus adapting the thermal management strategy to different operational states

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the gate-source voltage parameter from a fixed value to a variable parameter that can be adjusted between different levels. This allows the power module to operate with high switching performance during normal conditions while extending short circuit withstand capability by reducing the gate-source voltage during fault conditions

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If high gate-source voltage is applied to achieve high switching currents and low switching losses, then switching performance is improved, but current overshoot during short circuit increases and heating is intensified

Engineering Contradiction:
Improveswitching lossesVSAvoidcurrent overshoot and heating
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The driver circuit implements dynamic gate-source voltage control that adjusts the voltage level based on the operational state. During normal switching, high voltage is applied to minimize switching losses. During short circuit detection, the voltage is dynamically reduced to limit current overshoot and associated heating, thus adapting the energy management to different operational conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The driver circuit applies preliminary anti-action by detecting short circuit conditions and preemptively reducing the gate-source voltage before the current overshoot can cause severe damage. This preventive voltage reduction counteracts the harmful effects of rapid current rise during short circuit events

Inventive Principle:
Principle #9Preliminary anti-action

3Reliability

If short circuit monitoring circuit is added to detect and shut down during short circuit, then protection capability is improved, but response time includes blanking time and reaction time that must be minimized

Engineering Contradiction:
Improveshort circuit protection capabilityVSAvoidblanking time and reaction time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The driver circuit performs preliminary action by being integrated directly with the power module and maintaining readiness to respond to short circuit conditions. The gate driver continuously monitors and can immediately adjust the gate-source voltage upon detecting abnormal conditions, eliminating delays associated with separate monitoring circuits and reducing the overall response time

Inventive Principle:
Principle #10Preliminary action

4Object-affected harmful factors

If gate-source voltage is reduced during short circuit to limit current, then current overshoot is reduced and thermal stress is decreased, but switching performance during normal operation must be maintained

Engineering Contradiction:
Improvecurrent overshoot and thermal stressVSAvoidswitching performance
Core Design Contradiction:
Object-affected harmful factorsVSSpeed

Solution Approach 1:

The driver circuit implements dynamic gate-source voltage control that adjusts the voltage level based on the operational state. During normal switching, high voltage is applied to minimize switching losses. During short circuit detection, the voltage is dynamically reduced to limit current overshoot and associated heating, thus adapting the energy management to different operational conditions

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4115525B1Driver circuit for a low inductive power module and a low inductive power module with enhanced short circuit withstand capability
Publication Date: 2025.08.13 ROBERT BOSCH GMBH
  • EP4115525B1 patent drawingFigure 1~2
  • EP4115525B1 patent drawingFigure 3~4
  • EP4115525B1 patent drawingFigure 5

AI summary

The invention relates to a driver circuit (200) for a low inductive power module (400) comprising a connection (10) and an output (20). The connection can be connected to the source contact (15) of a power transistor (12) and the output (20) can be connected to the gate contact (11) of the power transistor (12). The driver circuit (200) is designed to generate, in a first operating mode, a first gate-source voltage UGSI for the gate contact (11) of the power transistor (200) and to provide same at the output (20) of the driver circuit (200). According to the invention, the driver circuit (200) is further designed to generate, in a second operating mode during at least one predefined minimum period, a lower second gate-source voltage UGS2 for the gate contact (11) of the power transistor (12) and to provide same at the output (20) of the driver circuit (200).