Power Semiconductor Module Bridge for Equal Gate Inductance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Wide-band-gap semiconductor modules experience increased oscillations and power losses due to unequal gate inductances when multiple semiconductor switches are connected in parallel, necessitating additional resistors for oscillation suppression, which hinder the full realization of their fast switching capability.
Innovation Solution
A power semiconductor module design with parallel-connected wide-band-gap semiconductor switches, utilizing an interconnection bridge with a stacked layer structure and thin insulating layer to reduce gate loop inductance, and optionally incorporating compensation structures to equalize inductances, thereby eliminating the need for resistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If many wide-band-gap semiconductor switches are connected in parallel to achieve targeted current rating, then the current capacity is improved, but the gate inductance variation and switching synchronization deteriorate
Solution Approach 1:
The patent applies equipotentiality by designing an interconnection bridge that equalizes the gate inductance values across all parallel-connected semiconductor switches. The bridge structure with specifically designed conductive paths and insulating layers ensures that all gate terminals experience equivalent electrical conditions, eliminating inductance variations that would otherwise cause asynchronous switching and reliability issues.
Solution Approach 2:
The patent transitions from traditional planar wire-bond connections to a three-dimensional interconnection bridge structure. This dimensional change allows for optimized current paths and gate control loops that simultaneously serve multiple parallel switches, reducing overall inductance while maintaining equal distribution across all devices.
2Ease of manufacture
If conventional wire-bond connection is used between substrates, then the manufacturing process is simple, but the gate control loop inductance is high causing oscillations and power loss
Solution Approach 1:
The patent extracts and eliminates the problematic wire-bond interconnection layer by implementing a direct substrate-to-substrate interconnection bridge. This removes the additional inductance introduced by wire bonds while maintaining manufacturing feasibility through standardized ceramic substrate fabrication processes.
Solution Approach 2:
The patent replaces the mechanical wire-bond system with an integrated ceramic substrate interconnection system. The interconnection bridge is formed as part of the substrate structure itself, substituting discrete mechanical connectors with an integrated electrical pathway that reduces inductance and improves switching performance.
3Object-affected harmful factors
If resistors are added to attenuate oscillations between switches, then the switching oscillations are reduced, but the device complexity and production cost increase
Solution Approach 1:
The patent converts the potentially harmful oscillations into a benefit by designing the interconnection bridge to provide controlled inductance that actually dampens oscillations. The specific geometry and material properties of the interconnection bridge create a damping effect that reduces oscillations without requiring additional resistive elements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves reduced oscillations and power losses by minimizing gate inductance differences, allowing faster switching and lower production costs through the elimination or reduction of resistors.
Implementation Method 1
for a very close arrangement of two conductors the inductive coupling significantly increases
Implementation Method 2
Due to the anti-parallel direction of the currents and the mutual inductive coupling, a substantial reduction of the gate inductance can be effected
Data Source
Figure 1~2
Figure 3~5
Figure 6~7
AI summary
The disclosure relates to a power semiconductor module (1) with a plurality of semiconductor switches (4) arranged in at least two groups (2, 3, 32, 33), the semiconductor switches (4) having a first terminal and a second terminal of a controlled path and a control terminal, each group (2, 3, 32, 33) having a first group contact (14) which is connected to the first terminals, a second group contact which is connected to the second terminals and a control group contact (13) which is connected to the control terminals, an interconnection bridge (6) for connecting the control group contacts (13) and the first group contacts (14) of the at least two groups (2, 3, 32, 33), the interconnection bridge (6) comprising a layer structure with a first conductive layer (17) and a second conductive layer (18) being separated by an insulating layer (21).