Power Semiconductor Module With Interposer Gate Resistor Cooling
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Solution Overview
Problem
Existing power semiconductor modules face challenges in maintaining small ON-resistance and high-frequency operation due to increased gate resistor losses and size/cost issues when operated at high frequencies.
Innovation Solution
A power semiconductor module configuration with a heat dissipation sheet on the gate electrode side, incorporating a gate resistor within an interposer that dissipates heat through the semiconductor chip's heat path, using a semiconductor substrate for the interposer to manage thermal expansion and reduce inductance, and employing a resin housing to seal the components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If multiple resistance elements are connected in parallel or heat dissipation devices are attached to increase allowable loss, then the gate resistor loss capacity is increased, but the device size and cost increase
Solution Approach 1:
The heat dissipation sheet serves multiple functions: it dissipates heat from both the semiconductor chip and the gate resistor simultaneously. This multi-functionality eliminates the need for separate heat dissipation devices for the gate resistor, maintaining compact device size while increasing the allowable power loss capacity.
Solution Approach 2:
The gate resistor utilizes the existing heat dissipation infrastructure of the semiconductor chip's heat dissipation sheet. The gate resistor essentially 'services itself' by sharing the chip's thermal management resources, eliminating the need for additional dedicated cooling components.
2Ease of operation
If the gate resistor is disposed externally on the gate driving circuit, then the gate capacitance can be controlled, but the gate resistor loss cannot be effectively dissipated at high frequency
Solution Approach 1:
The interposer substrate acts as an intermediary between the semiconductor chip and the external gate driving circuit. It provides both the electrical connection for gate control and the thermal pathway for heat dissipation, mediating between the electrical and thermal requirements of the system.
3Reliability
If a semiconductor substrate is used for the interposer, then thermal expansion differences are suppressed improving reliability, but the manufacturing complexity increases
Solution Approach 1:
A semiconductor substrate is used for the interposer to match the thermal expansion characteristics of the power semiconductor chip. This homogeneity in material properties throughout the stacked structure suppresses thermal stress and improves reliability under temperature cycling conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The module achieves high-frequency operation with reduced ON-resistance, minimized size, and cost, while enhancing reliability by suppressing thermal stress and inductance, and allowing for various operating conditions without significant increases in manufacturing cost or device size.
Implementation Method 1
a heat dissipation sheet that discharges heat of the semiconductor chip to the outside of a resin housing
Implementation Method 2
the gate resistor is disposed on a heat dissipation path from the semiconductor chip to the heat dissipation sheet
Data Source
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AI summary
An object is to provide a power semiconductor module having a small ON-resistance and capable of operating at a high frequency. Included are: a semiconductor chip 2 configured to supply a power source, and including a voltage-driven switching element, and a gate electrode 20G provided on a main surface of the semiconductor chip 2; a heat dissipation sheet 3 disposed opposite the main surface of the semiconductor chip 2, and configured to dissipate heat of the semiconductor chip 2; a wiring board 4 disposed between the semiconductor chip 2 and the heat dissipation sheet 3, and including a gate wiring pattern 40G connected to an external terminal 6G; an interposer 5 including a sheet-like base material disposed between the semiconductor chip 2 and the wiring board 4, and a gate resistor 50G in the sheet-like base material and interposed between the gate electrode 20G and the gate wiring pattern 40G; and a resin housing 7 that seals the semiconductor chip 2, the wiring board 4, and the interposer 5.