Power Semiconductor Module With Spacer Layer Height Compensation
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Solution Overview
Problem
Existing power semiconductor modules face issues with non-uniform pressure distribution and complex assembly due to height variations and manufacturing tolerances, leading to increased costs and limited current capability, especially in high-power applications requiring silicon carbide or wide bandgap materials.
Innovation Solution
A power semiconductor module design featuring a conductive base, spacer layer, and conductive top with vertical connection elements that compensate for height differences, eliminating the need for springs and strain buffers, allowing for uniform pressure distribution and simplified assembly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If rigid presspack modules with parallel IGBTs are used, then current capability is improved, but uniform pressure distribution deteriorates due to height tolerances
Solution Approach 1:
The patent changes the physical state of the spacer layer from rigid to compliant, allowing it to deform and accommodate height variations in semiconductor devices. This compliant spacer layer maintains uniform pressure distribution across all devices while supporting high current capability through the conductive top plate and vertical connection elements.
Solution Approach 2:
The spacer layer acts as an intermediary element between the conductive top plate and the semiconductor devices. It mediates the mechanical interface by absorbing height tolerances and ensuring uniform pressure transmission, while the vertical connection elements provide the conductive path for current flow.
2Reliability
If spring-loaded presskit approaches are used, then reliable topside contact is improved, but cost deteriorates due to complex assembly requirements
Solution Approach 1:
The patent extracts the spring mechanism from the presspack assembly, replacing it with a compliant spacer layer that provides the necessary mechanical compliance without requiring active spring elements. This simplifies the assembly by eliminating complex spring-loaded mechanisms while maintaining reliable electrical contact.
Solution Approach 2:
The compliant spacer layer serves as a simple, inexpensive mechanical element that provides the necessary compliance function. Unlike expensive spring mechanisms, the spacer layer is a passive, easily manufactured component that achieves the same reliability goal at lower cost and complexity.
3Manufacturing precision
If strain buffers and conductive diaphragms are added for compensation, then height tolerance compensation is improved, but device complexity and cost deteriorate
Solution Approach 1:
The patent merges the functions of strain buffers, conductive diaphragms, and spacer layers into a single integrated compliant spacer layer structure. This unified component simultaneously provides mechanical compliance for height tolerance compensation and electrical conductivity for current flow, eliminating the need for multiple separate components.
Solution Approach 2:
The compliant spacer layer serves multiple functions: it compensates for height tolerances, maintains uniform pressure distribution, provides mechanical support, and facilitates electrical conductivity through the vertical connection elements. This multi-functional design eliminates the need for separate strain buffers and conductive diaphragms.
4Reliability
If multiple disc springs and support frames are used for each semiconductor device, then contact reliability is improved, but manufacturing cost deteriorates
Solution Approach 1:
The patent segments the presspack assembly into modular units where each semiconductor device is independently supported by the compliant spacer layer. This segmentation allows for simplified assembly while maintaining reliable contact, as each device can be positioned and connected without requiring complex inter-device mechanical structures.
Data Source
AI summary
The invention relates to a power semiconductor module comprising a conductive base, a conductive top, and at least two power semiconductor devices arranged between the conductive base and the conductive top. The semiconductor devices are each configured for a current of at least 1 A and/or for a voltage of at least 50 V. An insulating spacer layer is arranged on the power semiconductor devices and at least partially between the conductive base and the conductive top. At least two vertical connection elements pass from the power semiconductor devices through the spacer layer and conductively connect the conductive top with the power semiconductor devices. The spacer layer and the vertical connection elements are configured for compensating height differences of the power semiconductor devices.