Power Module with Inorganic Encapsulation and Direct Bonding
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Solution Overview
Problem
Conventional power modules are susceptible to moisture penetration, leading to corrosion and premature failure, and have high parasitic inductance due to bonding wires, which increases switching losses and reduces efficiency.
Innovation Solution
A power module design featuring a substrate with multiple layers and inorganic encapsulation using additive manufacturing for a fluid-tight connection of power semiconductors, reducing parasitic inductance and enhancing moisture resistance through direct copper bonding and metal deposition encapsulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional power modules are used with organic potting materials, then they provide basic encapsulation, but they are susceptible to moisture penetration and environmental damage
Solution Approach 1:
The patent employs a multi-layer substrate structure combining ceramic layers (aluminum oxide or aluminum nitride) with metal interconnects and dielectric materials. This composite construction provides both mechanical support and moisture barrier functionality, replacing the single-material organic potting approach with a engineered multi-material system that resists environmental degradation.
Solution Approach 2:
The ceramic substrate and metal encapsulation create an inert, sealed environment around the power semiconductor devices. This hermetic sealing isolates the sensitive electronic components from external environmental factors such as moisture, oxygen, and corrosive substances, effectively creating a protected internal atmosphere.
2Loss of energy
If bonding wires are used to connect power semiconductors, then electrical connection is achieved, but parasitic inductance increases causing switching losses
Solution Approach 1:
The patent removes the bonding wire connection method entirely and replaces it with direct planar contact connections through the multi-layer substrate structure. The power semiconductor devices are electrically connected directly to the substrate contact pads through metallization layers, eliminating the intermediate bonding wire element that causes parasitic inductance.
Solution Approach 2:
The connection approach transitions from three-dimensional bonding wires (extending vertically and diagonally) to two-dimensional planar metallization traces within the substrate layers. This dimensional change shortens the current path and reduces loop area, thereby minimizing parasitic inductance and associated switching losses.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides improved resistance to moisture and environmental influences, reduces parasitic inductance, and enhances efficiency by minimizing switching losses and extending the lifespan of power modules.
Implementation Method 1
a metallic first encapsulation is arranged in such a way that the power semiconductor is encapsulated in a fluid-tight manner
Implementation Method 2
the power semiconductor is connected to the first metallization by way of the first contact area, wherein the second contact area of the power semiconductor is electrically conductively connected to the second metallization
Data Source
AI summary
A power module includes a substrate having a first layer and a second layer which are connected to one another and arranged above one another. The first layer includes a first dielectric material having a metallization arranged on a side facing the second layer and the second layer includes a second dielectric material having a metallization arranged on a side facing away from the metallization of the first dielectric material. A power semiconductor having a first contact area and a second contact area opposite the first contact area is connected to the metallization of the first dielectric material via the first contact area and arranged in a first recess of the second layer. A metallic first encapsulation encapsulates the power semiconductor in a fluid-tight manner, with the second contact area of the power semiconductor being electrically conductively connected to the metallization of the second dielectric material via the first encapsulation.