Power Module Package Structure With Isolated Thermal Vias

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Solution Overview

Problem

As power module package structures evolve towards higher power, thinness, and density, effective heat dissipation becomes a critical challenge due to increased heat generation, which can adversely affect power chips if not adequately addressed.

Innovation Solution

A power module package structure incorporating a substrate with conductive layers and a power component featuring a chip and a spacer with vertical conductive connectors and an insulating heat dissipation layer, which forms both a conductive and heat dissipation path between the chip and the substrate, optimizing thermal conductivity and electrical isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the power module package structure develops towards high power and high density, then the power output and functionality are improved, but the heat generation increases and heat dissipation becomes more difficult

Engineering Contradiction:
Improvepower outputVSAvoidheat dissipation
Core Design Contradiction:
PowerVSTemperature

Solution Approach 1:

The heat dissipation space is segmented into multiple regions with different insulating heat dissipation layers (first, second, third layers with different thermal conductivities), allowing different parts of the structure to handle heat dissipation differently based on local requirements

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the heat dissipation space are assigned different insulating heat dissipation layers with varying thermal conductivities, creating local quality variations that optimize heat dissipation in critical areas while maintaining electrical isolation

Inventive Principle:
Principle #3Local quality

2Length of moving object

If the power module package structure develops towards thinness, then the form factor is reduced, but the heat dissipation path length is shortened making heat removal more challenging

Engineering Contradiction:
Improvepackage thicknessVSAvoidheat dissipation efficiency
Core Design Contradiction:
Length of moving objectVSTemperature

Solution Approach 1:

The heat dissipation structure uses composite materials including insulating heat dissipation layers with different thermal conductivities arranged in specific configurations, creating a composite thermal management system that achieves effective heat dissipation in a thin profile

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The insulating heat dissipation layers are strategically positioned with varying thermal conductivities in different regions of the thin package structure, optimizing heat dissipation where needed most while maintaining the overall thin form factor

Inventive Principle:
Principle #3Local quality

3Temperature

If vertical conductive connectors are used to form heat dissipation paths, then thermal conductivity is improved, but electrical isolation between connectors becomes critical to prevent short circuits

Engineering Contradiction:
Improvethermal conductivityVSAvoidelectrical isolation
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

Insulating heat dissipation layers are introduced as intermediary materials between vertical conductive connectors, allowing thermal energy to be managed while maintaining electrical isolation and preventing short circuits between adjacent connectors

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure combines conductive materials (vertical connectors) with insulating heat dissipation layers having different thermal conductivities, creating a composite system that simultaneously achieves thermal conduction and electrical isolation

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances heat dissipation efficiency, reducing thermal resistance and improving the overall performance of power module packages by effectively transmitting both signal and heat generated by the chip to the substrate, thereby preventing adverse effects on the power chip.

Implementation Method 1

The vertical conductive connector includes two opposite ends. One end is electrically connected to the conductive layer, and the other end is electrically connected to the electrode to form a conductive path and a heat dissipation path between the first chip and the first substrate

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The insulating heat dissipation layer surrounds the vertical conductive connector and electrically isolates the vertical conductive connector

Methodology Applied
Scientific EffectThermal insulation: Thermal Insulation

Data Source

PatentUS20240243097A1Power module package structure
Publication Date: 2024.07.18 IND TECH RES INST
  • US20240243097A1 patent drawing
  • US20240243097A1 patent drawing
  • US20240243097A1 patent drawing

AI summary

A power module package structure includes a first substrate and a power component. The first substrate includes at least one conductive layer on a surface thereof. The power component includes a first chip and a first spacer. The first chip has at least one electrode. The first spacer in a heat dissipation space between the first substrate and the first chip includes an insulating heat dissipation layer in the heat dissipation space and multiple vertical conductive connectors, each of the vertical conductive connectors penetrates the insulating heat dissipation layer. The insulating heat dissipation layer surrounds the vertical conductive connectors and electrically isolates the vertical conductive connectors. The vertical conductive connector includes two opposite ends, one end electrically connected to the conductive layer, and the other end electrically connected to the electrode to form a conductive path and a heat dissipation path between the first chip and the first substrate.