Power Module Joining Layer for Higher Current Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current power electronics modules face challenges in increasing power density due to limitations in current rating, which is time-consuming and costly to achieve through new chip technologies, necessitating alternative methods to optimize existing module designs.
Innovation Solution
The use of a common, uninterrupted joining layer between power electronic devices and a substrate's metallization area allows for closer device placement, maximizing active area and current rating without increasing module size, utilizing techniques like soldering or diffusion soldering for alignment and attachment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If separate joining layers are used for each power electronic device, then each device can be individually attached, but the space utilization is reduced due to gaps between devices and manufacturing complexity increases
Solution Approach 1:
Multiple separate joining layers for individual power electronic devices are merged into a single common uninterrupted joining layer that spans across the metallization area, eliminating gaps between devices and reducing manufacturing steps while maximizing active area utilization
2Productivity
If power electronic devices are placed closer together, then the current rating increases due to higher power density, but the manufacturing precision requirements increase
Solution Approach 1:
The common uninterrupted joining layer enables self-alignment of power electronic devices through its continuous structure, allowing devices to be placed closer together for higher current rating while automatically maintaining proper alignment without requiring high manufacturing precision
3Loss of energy
If new chip technologies are developed to increase power density, then conduction and switching losses are reduced, but the development time and cost increase significantly
Solution Approach 1:
The invention replaces the need for developing new chip technologies with a structural modification approach, using a common uninterrupted joining layer to achieve higher power density and reduced losses through improved space utilization rather than through complex new chip designs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances current capability by optimizing substrate space usage, achieving higher power density with reduced manufacturing costs and improved thermal management through self-alignment and continuous electrical paths.
Implementation Method 1
utilizing techniques like soldering or diffusion soldering for alignment and attachment
Implementation Method 2
utilizing techniques like soldering or diffusion soldering for alignment and attachment
Implementation Method 3
improved thermal management through self-alignment and continuous electrical paths
Implementation Method 4
improved thermal management through self-alignment and continuous electrical paths
Data Source
Figure 1~2
Figure 3~4
Figure 5~6
AI summary
The present disclosure relates to a power electronics module (10) comprising: a substrate (11) with at least a first metallization area (12), a first group of power electronic devices (14) arranged in the first metallization area (12), wherein the first group comprises a plurality of power electronic devices (14). The power electronics module (10) further comprises a common, uninterrupted joining layer (13) arranged between the first metallization area (12) and the first group of power electronic devices (14), wherein the common, uninterrupted joining layer (13) establishes at least a mechanical and an electrical contact between the first metallization area (12) and the first group of power electronic devices (14). The present disclosure further relates to a method for manufacturing such a power electronics module (10).