Power Module Layout for Thermal Resistance and Stray Inductance
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Solution Overview
Problem
Existing power modules with wide-bandgap semiconductor switches face challenges in achieving balanced operation, low thermal resistance, and compact size due to thermal coupling and asymmetrical commutation loops when multiple switches are placed in close proximity.
Innovation Solution
A power module layout where semiconductor switches are arranged axis-symmetrically, with non-orthogonal or non-parallel sides to minimize thermal resistance and equalize commutation loops, using a substrate with conducting tracks to form a half bridge circuit and reduce stray inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If multiple semiconductor switches are placed in close proximity to achieve high power density, then the module size is reduced, but thermal resistance increases due to thermal coupling between switches
Solution Approach 1:
The patent applies asymmetry by arranging semiconductor switches in a non-linear, non-uniform pattern on the substrate. Instead of placing switches in close proximity in a regular grid, the layout uses asymmetric positioning with varying distances between switches, creating an optimized thermal distribution pattern that reduces thermal coupling while maintaining compact module size.
2Stability of the object's composition
If semiconductor switches are arranged symmetrically to achieve balanced operation, then current-sharing symmetry is improved, but thermal resistance increases due to larger spacing between switches
Solution Approach 1:
The patent applies local quality by creating different spatial relationships for different switches in the parallel configuration. Each switch has a locally optimized position that balances its commutation loop symmetry with its thermal distance from other switches. This local optimization allows each switch to operate symmetrically while maintaining adequate thermal spacing, resolving the contradiction between global symmetry and local thermal management.
3Temperature
If semiconductor switches are placed far apart to reduce thermal resistance, then thermal coupling is minimized, but the module size increases and space efficiency decreases
Solution Approach 1:
The patent applies dimensionality change by transitioning from a two-dimensional planar arrangement to a three-dimensional layered structure. Multiple semiconductor switches are arranged on different layers or levels, allowing them to be positioned far apart in the horizontal plane (reducing thermal coupling) while maintaining compact overall module volume through vertical stacking. This multi-layer approach effectively decouples thermal distance from module footprint.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This layout enables simultaneous switching and balanced operation of multiple semiconductor switches in parallel, reducing thermal resistance and stray inductance, resulting in more stable and efficient power module performance.
Implementation Method 1
there should be a very low thermal resistance (Rth) path between a heat generating component, such as a semiconductor switch, and the means by which heat is removed from the module
Implementation Method 2
using a substrate with conducting tracks to form a half bridge circuit and reduce stray inductance
Data Source
AI summary
A power module (1) includes a group of at least three rectangular electrical power components (11, 12, 13, 14, 23, 24, 25, 26) arranged on a substrate (2), wherein in that at least one side (31) of at least one of the rectangular electrical power components (11, 14) is not orthogonal or parallel to a line (3) that passes through the geometric centres of the remaining rectangular electrical power components (12, 13) of the group.