Power Module Package Layout for Low-EMI Current Loops
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Module power supplies face challenges in integrating complex filter systems due to their small size and simple structure, making it difficult to effectively suppress electromagnetic interference (EMI) noise, particularly due to parasitic inductance generated by current loops.
Innovation Solution
A package structure for power supply modules is designed with a die and capacitive element on different horizontal planes, separated vertically, and connected through structures forming parallel current paths with opposite current directions, which cancel out magnetic fields and reduce parasitic inductance, thereby minimizing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a complex filter system is integrated to improve electromagnetic interference characteristics, then EMI suppression is enhanced, but device complexity and size increase
Solution Approach 1:
The patent extracts and eliminates the noise source at its origin by optimizing the current loop structure, rather than adding complex filter systems. The design removes parasitic inductance through strategic component placement and ground layer configuration, addressing EMI by taking out the harmful element (parasitic inductance) rather than filtering its effects.
Solution Approach 2:
The patent converts the harmful effect of current loops into a beneficial structure by designing controlled current paths that generate opposing magnetic fields. The ground layer and power element arrangements are specifically designed so that magnetic fields cancel each other out, transforming what would normally be harmful electromagnetic radiation into a neutral or beneficial configuration.
2Object-affected harmful factors
If parasitic inductance is reduced by optimizing current loop structure, then electromagnetic interference is suppressed, but the design complexity of the package structure increases
Solution Approach 1:
The patent moves the capacitive element to a different horizontal plane (vertical dimension) rather than placing it adjacent to the die on the same plane. This three-dimensional arrangement creates parallel current paths on different planes, which reduces parasitic inductance by minimizing the current loop area while managing the increased spatial complexity through vertical integration.
Solution Approach 2:
The patent merges multiple functions into the ground layer structure, which serves both as an electrical ground reference and as a magnetic field cancellation element. The ground layer is strategically positioned to create opposing current paths that cancel magnetic fields, combining grounding and EMI suppression functions into a single structural element.
3Object-affected harmful factors
If current loop area is minimized to reduce noise, then electromagnetic compatibility is improved, but the flexibility in component placement is reduced
Solution Approach 1:
The patent utilizes the vertical dimension by placing the capacitive element on a different horizontal plane than the die, connected through vertical connection structures. This dimensional transition minimizes the horizontal current loop area (reducing noise) while maintaining design flexibility through the use of multiple connection points and vertical routing options.
Solution Approach 2:
The patent employs connection structures that can adapt to different configurations, allowing the current paths to be optimized for minimal loop area while maintaining flexibility in component placement. The ground layer and connection structures are designed to dynamically adjust current flow paths to achieve optimal noise reduction regardless of specific component positions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces parasitic inductance and noise in power supply modules, enhancing electromagnetic compatibility by minimizing the area and energy storage of the current loop, thus improving EMI characteristics.
Implementation Method 1
directions of currents of the two parallel current paths are at least partially opposite to decrease electromagnetic interference
Implementation Method 2
reduce parasitic inductance generated by the current loop
Data Source
AI summary
A package structure for a power supply module, can include: a die and a capacitive element that are separated from each other and arranged on different horizontal planes with different heights along a vertical direction of the package structure; connection structures that connect to the die and to the capacitive element; where a current loop comprising at least two parallel current paths on different horizontal planes with different heights along the vertical direction of the package structure is formed; and where the current loop passes through the die, the capacitive element, and the connection structures, and directions of currents of the two parallel current paths are at least partially opposite to each other in order to decrease electromagnetic interference.