Power Module Layout for Equalized Gate and Drive Path Inductance
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Solution Overview
Problem
Power modules used in high-current applications experience unstable operation due to variations in inductance values between control and drive electrodes, leading to inconsistent timing for activating and deactivating power semiconductor elements.
Innovation Solution
A power module design featuring an electrically insulative substrate with conductive layers and detour portions that reduce the difference in the sum of conductive path lengths between control and drive electrodes, stabilizing the inductance values and thus the timing of power semiconductor element activation and deactivation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If power semiconductor elements are arranged in parallel groups connected in series for high current supply, then the current capacity is improved, but variations in inductance values between control and drive electrodes cause unstable operation
Solution Approach 1:
The patent applies equipotentiality by designing the conductive paths such that the sum of path lengths from control electrode to control terminal and from drive electrode to detection terminal is equalized across all power semiconductor elements. This is achieved through the detour portion in the conductive path that compensates for positional differences, ensuring equal inductance values and stable operation timing for all elements in the parallel groups.
Solution Approach 2:
The patent introduces a detour portion in the conductive path that extends in a direction different from the arrangement direction of the power semiconductor elements. This dimensional approach allows the path length to be adjusted independently of the element positioning, enabling equalization of total path lengths for elements arranged in parallel groups.
2Adaptability or versatility
If power semiconductor elements are positioned at different locations on the substrate, then the layout flexibility is improved, but the difference in conductive path lengths causes variations in activation and deactivation timing
Solution Approach 1:
The conductive path is designed with a detour portion that compensates for the positional differences of power semiconductor elements on the substrate. By extending the path in a direction different from the element arrangement direction, the total path length (control electrode to control terminal plus drive electrode to detection terminal) is equalized, ensuring consistent timing despite layout flexibility.
Solution Approach 2:
The detour portion is pre-designed into the conductive path layout to anticipate and compensate for the positional variations of power semiconductor elements. This preliminary structural arrangement ensures that all elements, regardless of their specific positions, will have equal total conductive path lengths and thus consistent activation and deactivation timing.
Data Source
AI summary
A power module includes a mount layer, a control layer, and a drive layer that are formed on an electrically insulative substrate and multiple power semiconductor elements mounted on the mount layer in one direction and each including a first drive electrode connected to the mount layer, a second drive electrode connected to the drive layer, and a control electrode connected to the control layer. A control terminal is connected to the control layer and a detection terminal is connected to the drive layer. At least one of the control layer and the drive layer includes a detour portion that detours to reduce a difference between the power semiconductor elements in a sum of a length of a first conductive path between the control electrode and the control terminal and a length of a second conductive path between the second drive electrode and the detection terminal.