Transfer-Molded Power Module Pin Layout for Isolation and Low Inductance
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Solution Overview
Problem
Existing semiconductor device modules face issues such as signal pin deformation or breakage during insertion, increased module dimensions for electrical isolation, high stray inductance due to single leadframe current flow paths, and reliability concerns from thermo-mechanical stresses during attachment to thermal-dissipation appliances.
Innovation Solution
The solution involves arranging signal pins and power tabs on a primary surface of the module instead of the edge, using pre-molded signal pins with spring portions and mechanical stops to prevent deformation, and attaching the substrate to a thermal-dissipation appliance first to avoid adhesive issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If signal pins are arranged along the edge of the module, then electrical isolation spacing can be achieved, but the overall module dimensions increase
Solution Approach 1:
The patent transitions signal pins from an edge arrangement (1D/2D configuration along the module perimeter) to a face arrangement (2D/3D configuration on the primary surface). This dimensional change allows signal pins to be positioned in a compact grid pattern on the module face, achieving electrical isolation through spatial separation in multiple dimensions rather than requiring increased linear spacing along the edge, thereby reducing overall module dimensions while maintaining isolation requirements.
2Ease of operation
If signal pins are bent to facilitate insertion into PCB, then ease of insertion is improved, but deformation or breakage occurs during insertion
Solution Approach 1:
The patent applies preliminary action by pre-forming the signal pins with appropriate bends and shapes during the molding process itself, rather than requiring post-assembly bending. The signal pins are configured with insertion-friendly geometries (such as pre-bent leads or shaped distal ends) before module assembly, allowing them to be directly inserted into PCBs without additional deformation steps that would compromise their structural integrity.
3Reliability
If guide part or tool is used to prevent signal pin deformation, then signal pin integrity is improved, but system complexity and cost increase
Solution Approach 1:
The patent extracts the protective function from external guide parts or tools and integrates it directly into the signal pin structure and molding compound. The molding compound is configured to provide mechanical support and protection to the signal pins during insertion, eliminating the need for separate guide components. This integration removes the complexity associated with additional parts while maintaining signal pin integrity.
4Ease of manufacture
If single body stamping process is used for leadframe, then manufacturing simplicity is improved, but stray inductance increases
Solution Approach 1:
The patent segments the leadframe structure into multiple independently formed components rather than using a single monolithic stamped piece. By dividing the current path into separate segments (such as individual power tabs, signal tabs, and interconnect elements that can be separately formed and assembled), the current flow paths are optimized to minimize loops and stray inductance, while still maintaining manufacturing simplicity through modular construction techniques.
5Temperature
If power module is attached to thermal-dissipation appliance after package assembly, then thermal management is achieved, but adhesive consistency and void reduction become difficult
Solution Approach 1:
The patent applies preliminary action by performing the substrate attachment to the thermal-dissipation appliance before completing the full package assembly. By attaching the substrate (DBC orAMB) to the heat sink or cooling jacket in an early stage, the adhesive layer can be applied and cured under controlled conditions with proper positioning and pressure, ensuring consistent thickness and minimal voids. Subsequent assembly steps (die attachment, wire bonding, molding) are then performed on the already-thermally-managed substrate, preserving adhesive quality while achieving thermal management.
6Strength
If thermal processing is used for attachment to thermal-dissipation appliance, then bonding strength is improved, but internal solder re-melting occurs
Solution Approach 1:
The patent applies parameter changes by carefully controlling and adjusting the thermal processing parameters (temperature, time, pressure) during attachment to the thermal-dissipation appliance. The attachment process uses temperature and pressure profiles that are optimized to achieve sufficient bonding strength for the substrate-to-heat-sink interface while remaining below the re-melting temperature of the internal solder joints. This parameter optimization allows simultaneous achievement of strong bonding and solder integrity.
Data Source
AI summary
In a general aspect, an electronic device assembly includes a substrate arranged in a plane. The substrate has a first side and a second side, the second side being opposite the first side. The assembly also includes a plurality of semiconductor die disposed on the first side of the substrate and at least one signal pin. The at least one signal pin includes a proximal end portion coupled with the first side of the substrate, a distal end portion, and a medial portion disposed between the proximal end portion and the distal end portion. The medial portion is pre-molded in a molding compound, the proximal end portion and the distal end portion exclude the molding compound. The at least one signal pin is arranged along a longitudinal axis that is orthogonal to the plane of the substrate.


