Power Module Solder Fillet Length Optimization
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Solution Overview
Problem
Conventional power modules face challenges in achieving high packaging density while minimizing the distances between semiconductor chips and the conductor plate edges, leading to potential short circuits due to solder overflow, which can result in performance degradation.
Innovation Solution
A power module design where semiconductor chips are arranged such that the lengths of solder fillets on edges adjacent to other chips and the conductor plate are optimized, with shorter fillets on edges closer to adjacent chips and longer fillets on edges closer to the conductor plate's side ends, to prevent solder overflow and short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If distances between semiconductor chips and distances between chips and conductor plate edges are reduced to achieve high packaging density, then packaging density is improved, but solder overflow occurs causing short circuits between chips or between other members
Solution Approach 1:
The patent applies local quality by making the solder fillet length vary according to the local distance requirements. Specifically, shorter solder fillets are formed at chip edges where the distance to adjacent chips is small, while longer solder fillets are formed at chip edges where the distance to conductor plate edges is larger. This localized adjustment of solder fillet length prevents solder overflow in critical areas while maintaining packaging density.
Solution Approach 2:
The patent changes the parameter of solder fillet length based on the spatial relationship between chips and conductor plate edges. By adjusting the solder fillet length parameter according to local distance measurements, the invention optimizes both packaging density and reliability, preventing short circuits while maximizing component placement efficiency.
2Reliability
If solder fillet length is increased to prevent short circuits between chips, then reliability is improved, but solder may overflow from conductor plate edges causing short circuits between other members
Solution Approach 1:
The patent applies local quality by differentiating solder fillet lengths at different chip edges. At edges adjacent to other semiconductor chips, shorter solder fillets are formed to prevent inter-chip short circuits. At edges adjacent to conductor plate edges, longer solder fillets are formed to prevent solder overflow onto the conductor plate. This localized differentiation resolves the contradiction between preventing chip short circuits and avoiding conductor plate solder overflow.
3Ease of manufacture
If uniform solder fillet length is used for all chip edges, then manufacturing simplicity is maintained, but solder overflow occurs when chip distances or edge distances are shorter than predetermined values
Solution Approach 1:
The patent resolves the manufacturing complexity issue by implementing local quality control in the soldering process. The soldering conditions are adjusted based on the specific edge being soldered - with different parameters for edges adjacent to chips versus edges adjacent to conductor plate edges. This approach maintains reliability while keeping the manufacturing process manageable through localized parameter adjustment rather than complete uniformity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses short circuits and solder overflow, enhancing the reliability and performance of the power module by carefully managing solder fillet lengths and positions.
Implementation Method 1
the semiconductor chip soldered to the base plate
Implementation Method 2
a length of a solder fillet formed on an edge of the first semiconductor chip
Data Source
AI summary
A power module includes a base plate, first, second, and third semiconductor chips. At least one of a third edge or fourth edge of the first semiconductor chip is disposed adjacent to a side end of the base plate. Among a half of a distance from a first edge of the first semiconductor chip to one edge of the second semiconductor chip, a half of a distance from a second edge of the first semiconductor chip to one edge of the third semiconductor chip, and a distance from the third edge or fourth edge of the first semiconductor chip disposed adjacent to the side end of the base plate to the side end of the base plate, a length of a solder fillet formed on the edge of the first semiconductor chip at the shortest distance is formed in the shortest length.


