Dual-Side Cooled Power Module Packaging Without Spacer Blocks

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Solution Overview

Problem

Existing dual-side cooled device packages that use conductive spacer blocks face challenges such as high costs, complex assembly processes, and mechanical stresses due to tolerance issues, which can lead to thermal-mechanical stress and defects like warpage.

Innovation Solution

The method involves disposing a semiconductor die directly between two direct bonded metal (DBM) substrates without an intervening spacer block, using adhesive layers for thermal coupling, and incorporating leadframes in direct contact with the substrates for electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive spacer blocks are used in dual-side cooled device packages, then thermal coupling between substrates and power device is achieved, but manufacturing cost increases and assembly complexity increases

Engineering Contradiction:
Improvethermal couplingVSAvoidassembly complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the conductive spacer block from the package structure, allowing the power device to be directly bonded between the first and second substrates. This extraction of the intermediate component simplifies the assembly process while maintaining thermal coupling through direct bonding interfaces.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the functions of the power device mounting and thermal coupling by directly bonding the power device to both substrates simultaneously. This eliminates the need for separate spacer block assembly steps and integrates the thermal path directly through the power device.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If conductive spacer blocks are used in dual-side cooled device packages, then thermal coupling is achieved, but manufacturing cost increases

Engineering Contradiction:
Improvethermal couplingVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The conductive spacer block is removed from the bill of materials, reducing component count and associated manufacturing costs. The direct bonding approach eliminates the need to source, handle, and assemble the spacer block component.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses adhesive layers that can be applied directly in the bonding process, replacing the more expensive and complex conductive spacer block. The adhesive material is applied as a thin layer during assembly, reducing material cost and simplifying the manufacturing process.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Temperature

If conductive spacer blocks are used in dual-side cooled device packages, then thermal management is achieved, but mechanical stresses increase due to CTE mismatch

Engineering Contradiction:
Improvethermal managementVSAvoidmechanical stress
Core Design Contradiction:
TemperatureVSStress or pressure

Solution Approach 1:

The conductive spacer block, which has different CTE properties from the substrates and power device, is removed from the structure. This eliminates the CTE mismatch interface that causes mechanical stress during thermal cycling.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent creates a more homogeneous material structure by directly bonding substrates to the power device with adhesive layers. This reduces the number of material interfaces with different CTE properties, thereby reducing thermal-mechanical stress in the assembled package.

Inventive Principle:
Principle #33Homogeneity

4Reliability

If conductive spacer blocks are used in dual-side cooled device packages, then thermal coupling is achieved, but assembly process becomes complex

Engineering Contradiction:
Improvethermal couplingVSAvoidassembly process
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The conductive spacer block is removed from the assembly sequence, reducing the number of discrete assembly steps. The power device can be directly mounted between substrates in a single bonding operation rather than requiring separate spacer block installation steps.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The mounting and thermal coupling functions are merged into a single direct bonding operation. The power device serves as both the mounted component and the thermal conduction path, eliminating the need for separate spacer block assembly operations.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the assembly process, reduces material costs, and enhances reliability by eliminating CTE-mismatched materials, thereby improving thermal management and electrical performance while minimizing mechanical stresses.

Implementation Method 1

bonding the semiconductor die (e.g., directly) to the first DBM substrate using a first adhesive layer without any intervening spacer block between the semiconductor die and the first DBM substrate, and bonding the semiconductor die (e.g., directly) to the second DBM substrate using a second adhesive layer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250192097A1High power module package structures
Publication Date: 2025.06.12 SEMICON COMPONENTS IND LLC
  • US20250192097A1 patent drawing
  • US20250192097A1 patent drawing
  • US20250192097A1 patent drawing

AI summary

A method includes disposing a first direct bonded metal (DBM) substrate substantially parallel to a second DBM substrate a distance apart to enclose a space. The method further includes disposing at least a semiconductor die in the space, and bonding the semiconductor die to the first DBM substrate using a first adhesive layer without an intervening spacer block between the semiconductor die and the first DBM substrate, and bonding the semiconductor die to the second DBM substrate using a second adhesive without an intervening spacer block between the semiconductor die and the second DBM substrate.