Power Module Spacers Limit Solder Area to Reduce Thermal Stress

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Solution Overview

Problem

Conventional power modules face challenges in widening the operating temperature range due to thermal stress caused by differences in linear expansion coefficients between chip components and wiring patterns, leading to excessive solder joining and increased bending stress.

Innovation Solution

The power module incorporates spacers positioned between the chip component and circuit patterns to limit the solder joining area, reducing thermal stress by preventing solder from advancing under the spacers and allowing controlled solder thickness, thereby alleviating stress on the chip components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the solder joining area between the chip component and circuit pattern is increased to secure firm joining, then the joining strength is improved, but the thermal stress and bending stress on the chip component increase excessively

Engineering Contradiction:

Improvejoining strengthVSAvoidthermal stress

Core Design Contradiction:

StrengthVSStress or pressure

Solution Approach 1:

The solder joining area is segmented into two distinct regions: a first solder region with a first solder layer providing firm joining, and a second solder region with a second solder layer providing stress relief. This segmentation allows each region to serve a different function, resolving the contradiction between needing strong joining and avoiding excessive stress.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different solder layer configurations are applied to different locations: the first solder layer is positioned to provide strong joining at the electrode-circuit pattern interface, while the second solder layer is positioned to provide stress relief in the spacer region. This local differentiation allows the system to achieve both firm joining and stress reduction simultaneously.

Inventive Principle:

Principle #3Local quality

2Temperature

If the operating temperature range is widened, then the thermal performance is improved, but the deflection due to linear expansion coefficient difference increases, causing larger bending stress on the chip component

Engineering Contradiction:

Improveoperating temperature rangeVSAvoidbending stress

Core Design Contradiction:

TemperatureVSStress or pressure

Solution Approach 1:

The second solder layer acts as a cushioning element that is prepared in advance to absorb and distribute thermal stresses. This preemptive stress distribution mechanism allows the module to withstand temperature variations without generating excessive bending stress on the chip component.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

3Ease of manufacture

If the thickness of solder between the chip component and wiring pattern is not controlled in conventional mounting, then the manufacturing process is simpler, but the solder thickness becomes considerably thin, requiring costly special electrode structures to widen the operating temperature range

Engineering Contradiction:

Improvemounting process simplicityVSAvoidoperating temperature range

Core Design Contradiction:

Ease of manufactureVSTemperature

Solution Approach 1:

The spacer is positioned in advance during the mounting process to pre-determine and control the solder thickness before soldering occurs. This preliminary positioning action ensures that the solder layer achieves the optimal thickness needed for thermal performance without requiring complex post-processing or special electrode structures.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively widens the operating temperature range while reducing thermal stress on chip components, preventing excessive solder joining and maintaining assembly efficiency with controlled solder thickness.

Implementation Method 1

The first electrode and the second electrode and the first circuit pattern and the second circuit pattern are respectively joined with solder layers

Methodology Applied

Scientific EffectSoldering: Soldering

Implementation Method 2

two spacers are provided in parallel with each other respectively at positions close to the first electrode and the second electrode. The solder layers do not exist on an inner side of the two spacers

Methodology Applied

Scientific EffectPhysical barrier: Physical Containment

Implementation Method 3

there is a large difference in linear expansion coefficient between such members. When the operating temperature range of the power module is widened, it is considered that deflection due to the difference in linear expansion coefficient between members becomes large

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS10117335B1Power module

Publication Date: 2018.10.30 MITSUBISHI ELECTRIC CORP

AI summary

A power module includes a power semiconductor device, and a chip component arranged on first and second circuit patterns that are electrically connected to the power semiconductor device, and arranged so as to bridge the first and second circuit patterns. The chip component is arranged so that first and second electrodes are respectively positioned on the first and second circuit patterns, and the first and second electrodes and the first and second circuit patterns are respectively joined with solder layers. Between a lower surface of the chip component and the first circuit pattern and between the lower surface of the chip component and the second circuit pattern, two spacers are provided in parallel with each other respectively at positions close to the first and second electrodes. The solder layers do not exist on an inner side of the two spacers in parallel with each other.