Power Module Terminal Welding for Lower Junction Temperature
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Solution Overview
Problem
Defects in the connection points of soldered signal pins in power modules are caused by unmanaged temperatures, leading to unacceptable high junction temperatures and improper operation.
Innovation Solution
The implementation of a conductive base plate thermally coupled to the power electronic substrate, external conductive terminals welded to the substrate, and signal pins partially embedded in the frame, which reduce thermal resistance by absorbing thermal loads and providing alternative current pathways.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If soldered signal pins are used to provide connection points, then electrical connection is achieved, but high thermal resistance causes unacceptable junction temperatures and defects
Solution Approach 1:
The patent extracts the thermal management function from the electrical connection structure by introducing a separate conductive base plate. This base plate is thermally coupled to the power electronic substrate at the connection point to conduct heat away, while the soldered signal pin maintains its electrical connection function. This separation resolves the contradiction by allowing electrical connection without the thermal resistance penalty.
Solution Approach 2:
The conductive base plate acts as an intermediary thermal path between the power electronic substrate and the heat sink. It provides a low thermal resistance pathway that mediates the heat flow from the high-temperature junction through the connection point, preventing excessive temperature buildup while maintaining electrical connection integrity.
2Reliability
If thermal load is concentrated at connection points, then electrical connection is maintained, but thermal resistance increases causing defects
Solution Approach 1:
The patent segments the thermal management function from the electrical connection function. The conductive base plate handles thermal load distribution while the signal pin maintains electrical connection. This segmentation prevents thermal load concentration at the connection point by providing a dedicated thermal conduction path that distributes heat away from the sensitive solder joint area.
3Device complexity
If conventional thermal management is not implemented, then device complexity is reduced, but unmanaged temperatures cause defects and improper operation
Solution Approach 1:
The patent merges the thermal management function into the existing electrical connection structure by making the conductive base plate integral to the connection point assembly. The base plate is thermally coupled at the same location where electrical connection occurs, combining thermal conduction and electrical connection functions in a unified structure. This merging provides effective thermal management without significantly increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces thermal resistance, enhancing the performance, lifetime, and production yield of power modules by improving thermal management.
Implementation Method 1
a conductive base plate is thermally coupled to a bottom surface of the power electronic substrate attached to the bottom of the frame. The conductive base plate absorbs at least some of a thermal load at the connection point and reduces a thermal resistance junction-to-connection-point of the power module.
Data Source
AI summary
A method includes attaching a power electronic substrate to a bottom of a frame. The frame has a box-like rectangular shape with an open top and an open bottom. The method further includes disposing an external conductive terminal on the frame. The external conductive terminal has at least one terminal stub that extends on to the front surface of the power electronic substrate. The method further includes welding the at least one terminal stub to at least one circuit trace disposed on the front surface of the power electronic substrate.