Power Semiconductor Module Potting With UV Edge Sealing
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Solution Overview
Problem
The existing methods for assembling power semiconductor modules require additional pretreatment and hardening steps, increasing the process time and cost due to the need for gluing the housing to the substrate, which is not necessary for the module's operation but is required to prevent potting material leakage during shipping.
Innovation Solution
A method involving a housing directly adjoining the substrate without a glued joint, using a UV-curable potting material that is irradiated in specific areas to seal gaps and form an encapsulant, eliminating the need for gluing by creating a mechanical connection and rapidly hardening the potting material to prevent leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the housing is glued to the substrate to prevent potting material leakage during shipping, then the sealing reliability is improved, but the assembly process time and manufacturing cost increase due to additional pretreatment and hardening steps
Solution Approach 1:
The patent removes the housing gluing step entirely from the assembly process. Instead of using adhesive to seal the housing to the substrate, the potting material itself is used to fill and seal the housing cavity, eliminating the need for separate pretreatment and hardening steps while maintaining sealing reliability
Solution Approach 2:
The patent combines the functions of the housing seal and the potting material into a single integrated solution. The potting material serves both as the encapsulant for the semiconductor components and as the sealing medium for the housing, eliminating the need for separate gluing operations and reducing assembly steps
2Reliability
If the housing is glued to the substrate to prevent potting material leakage, then the sealing reliability is improved, but the manufacturing cost increases due to additional process steps
Solution Approach 1:
The patent eliminates the housing gluing operation from the manufacturing process. By using the potting material to seal the housing cavity instead of adhesive, the process removes pretreatment, adhesive application, and hardening steps, thereby reducing manufacturing complexity and cost
Solution Approach 2:
The potting material performs multiple functions simultaneously: it encapsulates the semiconductor components, provides electrical insulation, and seals the housing cavity to prevent leakage. This multi-functionality eliminates the need for separate sealing materials and processes, reducing overall manufacturing cost
3Productivity
If UV-curable potting material is used and irradiated to form an encapsulant, then the assembly process time is reduced, but additional UV irradiation equipment and process control are required
Solution Approach 1:
The patent replaces traditional thermal curing processes with UV photopolymerization. Instead of using heat and long curing cycles, UV-curable potting material is used that can be rapidly cured by UV irradiation, dramatically reducing assembly process time and enabling faster production
Solution Approach 2:
The patent changes the curing mechanism from thermal to photonic by using UV-curable potting material. This parameter change allows for rapid curing through UV irradiation, enabling the process to be completed in seconds or minutes rather than hours, thereby increasing productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the assembly steps and time, making the process more cost-effective by avoiding thermal stress and additional processing steps, while ensuring the encapsulant effectively seals the module without the need for a glued joint.
Implementation Method 1
irradiating a first portion of the potting material in areas of the potting material near an interface between the substrate and the sidewalls of the housing so as to seal any gaps between the substrate and the sidewalls of the housing
Implementation Method 2
irradiating exterior sections along the edges of the substrate with ultraviolet light, thereby triggering a cross-linking of the potting material along the edges of the substrate and forming a dam extending circumferentially along the edges of the substrate
Data Source
AI summary
A method for forming a power semiconductor module arrangement includes: arranging a housing on a substrate, the housing having sidewalls and being arranged to directly adjoin the substrate such that the substrate forms a ground surface of the housing; filling a liquid, viscous or semi-liquid UV-curable potting material into the housing so as to cover the substrate with the potting material; irradiating a first portion of the potting material in areas of the potting material near an interface between the substrate and the sidewalls so as to seal any gaps between the substrate and the sidewalls; and irradiating a second portion of the potting material farther away from the interface between the substrate and the sidewalls than the first portion of the potting material to form an encapsulant. Irradiation of the first and second portions of the potting material takes place at different times and/or via different radiation sources.