Power Module Vertical Pin Layout for Shorter Current Paths

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Solution Overview

Problem

Power modules used in hybrid and electric vehicles face challenges in achieving high strength, high heat dissipation, and minimizing current paths to improve efficiency and performance, while also ensuring long lifespan and reliability.

Innovation Solution

A power module design featuring a three-layer structure with a lower ceramic substrate, an upper ceramic substrate, and a PCB substrate, utilizing through holes and connection pins for perpendicular electrical connections, and incorporating a curvature inclined part at the edge of the ceramic substrate to reduce stress concentration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a high voltage and current are used to drive a motor, then power output is improved, but heat generation increases

Engineering Contradiction:
Improvepower outputVSAvoidheat generation
Core Design Contradiction:
PowerVSTemperature

Solution Approach 1:

The power module employs double-sided cooling with separate heat sinks provided on both the upper and lower substrates, dividing the heat dissipation function into two independent paths. This segmentation allows heat to be efficiently removed from both sides of the semiconductor chip, preventing heat accumulation while maintaining high power output capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces substrates as intermediary components between the semiconductor chip and heat sinks. These substrates serve as thermal conduits that transfer heat from the chip to the heat sinks on both sides, enabling efficient heat removal without direct contact between the chip and external cooling systems.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the current path is lengthened for electrical connections, then connectivity is improved, but electrical resistance increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidelectrical resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent transitions from planar electrical connections to three-dimensional vertical connections by providing heat sinks on both the upper and lower substrates. This dimensional change allows current paths to be shortened by utilizing vertical conduction through the substrates and connection pins, reducing electrical resistance while maintaining reliable connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The substrates serve multiple functions simultaneously: they provide mechanical support for the semiconductor chip, act as thermal conduits for heat dissipation, and serve as electrical connection pathways. This multi-functionality reduces the need for separate connection elements, minimizing current path length and associated resistance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If a sharp edge is used at the ceramic substrate, then manufacturing is simplified, but stress concentration increases

Engineering Contradiction:
Improvesubstrate fabricationVSAvoidstress resistance
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The patent applies curvature to the edge of the lower ceramic substrate, replacing sharp edges with rounded contours. This curvature eliminates stress concentration points that would otherwise form at sharp edges under thermal and mechanical loading, improving the substrate's strength and reliability while maintaining ease of manufacture through standard forming processes.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances strength and heat dissipation, minimizes current paths, improves efficiency and performance, prevents overheating, and extends the lifespan of the power module by reducing stress concentrations.

Implementation Method 1

a connection pin formed in the through hole of the upper ceramic substrate and the through hole of the PCB substrate in a way to penetrate through the through holes and configured to perpendicularly connect an electrode pattern of the ceramic substrate and an electrode pattern of the PCB substrate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

The connection pin formed in the through hole in a way to penetrate through the through holes may be bonded to an electrode pattern at an edge of the through hole by laser welding

Methodology Applied
Scientific EffectLaser welding: Laser Beam Welding

Implementation Method 3

a solder layer coated at the edge of the through hole, melted upon the laser welding, and configured to bond the connection pin to the electrode pattern at the edge of the through hole

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 4

a power module which secures long lifespan and reliability by reducing a stress concentration by forming a curvature inclined part at an edge of a ceramic substrate

Methodology Applied
Scientific EffectStress distribution:

Data Source

PatentUS20230275010A1Power module
Publication Date: 2023.08.31 AMOSENSE CO LTD
  • US20230275010A1 patent drawing
  • US20230275010A1 patent drawing
  • US20230275010A1 patent drawing

AI summary

The present invention relates to a power module comprising: a lower ceramic substrate (200); an upper ceramic substrate (300) which is disposed above the lower ceramic substrate (200) and has a semiconductor chip (G) mounted on the lower surface thereof; a PCB substrate (400) disposed above the upper ceramic substrate (300); and a connection pin (800) which extends through through holes (320 and 420) formed in the upper ceramic substrate (300) and the PCB substrate (400), and vertically connects electrode patterns (a, b, c, and d) formed on the upper ceramic substrate (300) and the PCB substrate (400). The present invention provides a shortened electrical connection distance between the upper ceramic substrate and the PCB substrate, and thus can minimize a current path and enhance the moving efficiency of a high-speed current.