Power Module Vertical Terminal Layout for Low-Inductance Packaging

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Solution Overview

Problem

Conventional Si power modules face limitations in miniaturization due to high thermal resistance and heat generation issues, which restrict their ability to output high power. Additionally, the horizontal disposition of power and signal terminals in transfermold-structured modules leads to insulation challenges and increased space requirements.

Innovation Solution

A power module semiconductor device with a vertical terminal transfermold design, featuring a straight wiring structure for power terminals and low series inductance, is proposed. This design includes an insulating substrate, a copper plate layer, a semiconductor chip, and resin-covered power and signal terminals. The fabrication method involves a metallic mold with a fixing mechanism for the signal terminals, allowing for efficient resin injection and sealing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If horizontal disposition of power and signal terminals is used in transfermold-structured modules, then the structure is simple, but insulation challenges occur and space requirements increase

Engineering Contradiction:
Improvestructure simplicityVSAvoidinsulation challenges
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent transitions from horizontal terminal disposition to vertical terminal disposition, changing the spatial dimension of terminal arrangement. This vertical configuration maintains structural simplicity while resolving insulation challenges by utilizing the vertical dimension for electrical isolation between power and signal terminals, eliminating the need for increased spacing requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conventional Si power modules are used, then manufacturing is straightforward, but miniaturization is restricted due to high thermal resistance and heat generation

Engineering Contradiction:
Improvemanufacturing straightforwardnessVSAvoidmodule size
Core Design Contradiction:
Ease of manufactureVSVolume of moving object

Solution Approach 1:

The patent changes the material parameter from conventional Si power devices to SiC (silicon carbide) power devices. This material parameter change fundamentally alters the thermal and electrical characteristics, enabling lower thermal resistance and reduced heat generation, which in turn allows for module miniaturization while maintaining ease of manufacture through established SiC fabrication processes.

Inventive Principle:
Principle #35Parameter changes

3Volume of moving object

If vertical terminal transfermold design is implemented, then space is saved and structure is simplified, but manufacturing precision requirements increase

Engineering Contradiction:
Improvemodule volumeVSAvoidterminal positioning precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent incorporates a fixing mechanism for signal terminals during the transfermold packaging process. This preliminary action of securing terminals in their precise vertical positions before resin injection ensures that the required manufacturing precision is achieved and maintained, while still realizing the space-saving benefits of the vertical terminal configuration.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12322683B2Power module semiconductor device and inverter equipment, and fabrication method of the power module semiconductor device, and metallic mold
Publication Date: 2025.06.03 ROHM CO LTD
  • US12322683B2 patent drawing
  • US12322683B2 patent drawing
  • US12322683B2 patent drawing

AI summary

The power module semiconductor device (2) includes: an insulating substrate (10); a first pattern (10a) (D) disposed on the insulating substrate (10); a semiconductor chip (Q) disposed on the first pattern; a power terminal (ST, DT) and a signal terminal (CS, G, SS) electrically connected to the semiconductor chip; and a resin layer (12) configured to cover the semiconductor chip and the insulating substrate. The signal terminal is disposed so as to be extended in a vertical direction with respect to a main surface of the insulating substrate.