Power MOSFET Superjunction Reliability via Localized Avalanche Control
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Solution Overview
Problem
Power semiconductor elements, such as power MOSFETs, are prone to avalanche breakdown phenomena in peripheral regions, leading to regional concentration of avalanche current and potential fracture due to higher source-drain breakdown voltages in these areas compared to cell regions, which compromises the reliability of the semiconductor device.
Innovation Solution
A semiconductor device with a superjunction structure is designed, where the n-type impurity concentration in the cell region is higher than in the peripheral region, and charge balance is maintained across both regions by regulating the impurity concentration, width, and pitch of column regions, causing an avalanche breakdown phenomenon to occur in the cell region before it occurs in the peripheral region, thus preventing fracture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the source-drain breakdown voltage in the peripheral region is made higher than in the cell region, then the breakdown voltage performance is improved, but avalanche current concentrates on the peripheral portion causing device destruction
Solution Approach 1:
The patent applies local quality by creating different impurity concentration profiles in different regions. The n-type impurity concentration is made higher in the cell region than in the peripheral region, while maintaining charge balance in each region. This local differentiation causes the avalanche breakdown to occur preferentially in the cell region rather than concentrating current in the peripheral region, thus resolving the contradiction between breakdown voltage performance and current distribution safety.
Solution Approach 2:
The patent changes the impurity concentration parameter differently across regions. Specifically, the n-type impurity concentration in the cell region is increased relative to the peripheral region, and the charge balance condition is adjusted in each region. These parameter changes modify the electric field distribution and breakdown characteristics, causing avalanche breakdown to occur in the cell region first, thereby preventing harmful current concentration in the peripheral region.
2Reliability
If a superjunction structure is used to achieve low on-resistance and high breakdown voltage, then the power MOSFET performance is improved, but avalanche breakdown is more likely to occur in the peripheral region
Solution Approach 1:
The patent maintains the superjunction structure in both cell and peripheral regions but applies local quality differentiation through varying n-type impurity concentrations. The cell region has higher n-type impurity concentration while the peripheral region has lower concentration, yet both regions maintain charge balance. This local differentiation ensures that despite the inherent peripheral region vulnerability in superjunction structures, the avalanche breakdown occurs in the cell region first, preventing device destruction.
Solution Approach 2:
The patent segments the device into cell region and peripheral region with distinct impurity concentration characteristics. By dividing the structure and applying different doping strategies to each segment while maintaining overall charge balance, the patent enables the superjunction structure to deliver its performance benefits while redirecting the avalanche breakdown location away from the vulnerable peripheral region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the likelihood of avalanche current exceeding the avalanche resistance in the peripheral region, enhancing the reliability of the power semiconductor element by ensuring the avalanche breakdown occurs in the cell region first, thereby preventing device fracture.
Implementation Method 1
an avalanche breakdown phenomenon is likely to occur, compared with in a cell region (active region) having the power MOSFET, in a peripheral region (termination region, terminal region) surrounding the outside of the cell region
Data Source
AI summary
To provide a semiconductor device including a power semiconductor element having improved reliability. The semiconductor device has a cell region and a peripheral region formed outside the cell region. The n type impurity concentration of n type column regions in the cell region is made higher than that of n type column regions comprised of an epitaxial layer in the peripheral region. Further, a charge balance is kept in each of the cell region and the peripheral region and each total electric charge is set so that a total electric charge of first p type column regions and a total electric charge of n type column regions in the cell region become larger than a total electric charge of third p type column regions and n type column regions comprised of an epitaxial layer in the peripheral region, respectively.