Power Mux Circuitry for Core-Cache Supply Rail Switching
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Solution Overview
Problem
Existing semiconductor designs face inefficiencies due to the need to supply both core logic and cache arrays with the same power supply, leading to wasted power and leakage when the core goes to sleep, as the cache arrays require a higher minimum voltage than the core logic.
Innovation Solution
Implementing power multiplexer (PMux) circuits to separately control the voltage supply for core logic and cache arrays, allowing them to operate on different voltage/frequency curves, thereby reducing power wastage and leakage by seamlessly switching between voltage sources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the same power supply is used for both core logic and cache arrays, then layout resource efficiency is improved, but power wastage and leakage increase when the core goes to sleep
Solution Approach 1:
The patent divides the power supply system into separate domains: a first power supply for the core logic and a second power supply for the cache arrays. This segmentation allows independent control of power to each component, enabling the core to be powered down while the cache remains active, thus reducing power wastage and leakage while maintaining layout efficiency.
Solution Approach 2:
The patent introduces dynamic power management through a power multiplexer that can switch between different power supply configurations. The system can dynamically transition between unified power mode (for layout efficiency) and separate power mode (for power savings), adapting to different operational states of the core and cache.
2Loss of energy
If separate power supplies are used for core logic and cache arrays, then power wastage and leakage are reduced, but device complexity increases
Solution Approach 1:
The patent introduces a power multiplexer as an intermediary component that manages the complexity of separate power supply control. This intermediary device handles the switching and coordination between the first and second power supplies, abstracting the complexity away from the core logic and cache arrays while enabling independent power control to reduce wastage and leakage.
3Reliability
If the core and cache arrays operate on the same voltage rail, then clock domain and voltage domain crossings are avoided, but power efficiency deteriorates at lower operating points
Solution Approach 1:
The patent segments the voltage domains by providing a first voltage rail for the core logic and a second voltage rail for the cache arrays. This allows the core to operate at lower voltages when needed while the cache maintains its required voltage level, improving power efficiency without causing clock domain or voltage domain crossings since each component operates within its own voltage domain.
Data Source
AI summary
A power multiplexer (mux) circuit to switch between core and memory power supply rails. The power mux includes controllable variable resistance legs to adjust supply switch path resistances, for example, based on differences between the core and supply voltage rails.