Power-On Fuse Read Verification in Semiconductor Storage
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Solution Overview
Problem
In NAND-type flash memory, the power-on voltage level is lower than the operation guaranteed voltage, leading to instability and potential failure in reading setting information during power-on operations due to voltage variations, resulting in incorrect command code reading and potential stuck operations.
Innovation Solution
A semiconductor storage device method involving a CPU that reads a special code from a ROM, determines its correctness, and only proceeds with reading setting information from the memory cell array when the special code is correctly read, ensuring accurate data retrieval by controlling the operation based on the read code.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the power-on voltage level is set lower than the operation guaranteed voltage to enable faster power-on detection, then the power-on detection speed is improved, but the reading accuracy of setting information from the memory cell array deteriorates due to voltage variations
Solution Approach 1:
The patent applies preliminary action by reading and verifying a special code from the ROM before proceeding to read the setting information from the memory cell array. This preliminary verification step ensures that the ROM is functioning correctly at the power-on voltage level, and only if the special code is correctly read does the system proceed to read the setting information, thereby preventing inaccurate readings due to voltage variations.
Solution Approach 2:
The special code stored in the ROM acts as an intermediary verification mechanism. By reading this special code first and checking its correctness, the system uses it as a mediator to determine whether the reading conditions are suitable before actually reading the critical setting information from the memory cell array.
2Speed
If the power-on voltage level is set lower than the operation guaranteed voltage, then the power-on operation can start earlier, but the operational stability deteriorates due to voltage variations causing command code reading failures
Solution Approach 1:
The system performs a preliminary read and verification of the special code from the ROM before executing the main power-on operations. This preliminary action confirms that the low power-on voltage level is sufficient for reliable operation, thereby ensuring operational stability while maintaining fast power-on startup.
Solution Approach 2:
The patent implements feedback by reading the special code, checking its correctness, and using this verification result to determine whether to proceed with reading the setting information. This feedback mechanism ensures that operations are only performed when voltage conditions are adequate, maintaining reliability despite operating at lower voltages.
3Measurement precision
If the power-on voltage level is set to match the operation guaranteed voltage, then the reading accuracy is improved, but the power-on detection time increases or repeated detection and reset operations occur
Solution Approach 1:
By performing the preliminary special code verification at the lower power-on voltage level, the system confirms reading capability before proceeding to read setting information. This allows the system to maintain fast power-on detection while ensuring accurate reading of setting information by only proceeding when verification succeeds.
Solution Approach 2:
The patent performs a partial verification action (reading only the special code) rather than the full operation (reading all setting information) at the critical power-on voltage level. This partial action confirms system functionality with minimal time loss, and only if successful does the system proceed to the full reading operation.
Data Source
AI summary
A semiconductor memory device and an operation method thereof that can accurately read setting information from a memory cell array when a power supply is turned on are provided. The flash memory includes a memory cell array, a detecting portion, a ROM and a control portion. The detecting portion detects that the power supply is turned on. The ROM stores at least a code for performing a reading operation of the memory cell array and stores a special code in a specific address. The control portion controls the reading of the ROM. When the detecting portion detects the power-on of the power supply, the control portion reads the special code from the ROM and determines whether the read special code is correct or not, reads the code if the determination is correct and again reads the special code if the determination is incorrect.