Power-On Reset Protection Circuit for Stable Low-Power Initialization

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Solution Overview

Problem

Existing power-on reset circuits in semiconductor devices are not sufficiently electrically stable, consume excessive power, and are vulnerable to environmental and process variations, leading to unreliable initialization operations.

Innovation Solution

A power-on reset circuit with a reset protection mechanism that generates a hold signal to deactivate the power-on reset circuit when not needed, providing a replacement signal to maintain initialization state, thereby reducing power consumption and ensuring stable operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the power-on reset circuit continuously generates power-on reset signals to maintain initialization state, then the reliability of initialization is improved, but power consumption increases

Engineering Contradiction:

Improveinitialization reliabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The power-on reset circuit operates periodically rather than continuously. The controller activates the power-on reset circuit only when initialization is needed (at power-on or after reset conditions), and deactivates it during normal operation. This periodic operation maintains initialization reliability while significantly reducing power consumption compared to continuous operation.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The system uses its own operational state information to control the power-on reset circuit. The controller monitors reset conditions and automatically activates/deactivates the power-on reset circuit based on these conditions, eliminating the need for external control and enabling self-managed power optimization.

Inventive Principle:

Principle #25Self-service

2Reliability

If the power-on reset circuit operates continuously to ensure electrical stability, then initialization reliability is improved, but device complexity increases

Engineering Contradiction:

Improveinitialization stabilityVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The power-on reset circuit transitions from a static continuous operation mode to a dynamic controlled operation mode. The controller adjusts the operation state of the power-on reset circuit based on real-time reset conditions, enabling the system to adapt its behavior to actual needs and reduce unnecessary complexity.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The controller receives feedback about reset conditions (such as voltage levels, temperature, or other parameters) and uses this feedback to control the activation and deactivation of the power-on reset circuit. This feedback mechanism ensures initialization stability while avoiding continuous operation and associated complexity.

Inventive Principle:

Principle #23Feedback

3Reliability

If the power-on reset circuit is always active to maintain reset signal, then initialization reliability is improved, but loss of time occurs due to unnecessary signal maintenance

Engineering Contradiction:

Improvereset signal reliabilityVSAvoidunnecessary signal maintenance time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The power-on reset circuit is activated periodically only when initialization is required, rather than continuously. The controller determines when initialization is needed and activates the circuit only during those periods, eliminating time wasted on maintaining reset signals during normal operation while ensuring reliability when needed.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The system discards (deactivates) the power-on reset circuit when its function is no longer needed and recovers (reactivates) it when initialization is required again. This approach eliminates unnecessary signal maintenance time while preserving the ability to provide reliable reset signals when needed.

Inventive Principle:

Principle #34Discarding and recovering

Data Source

PatentUS9202530B2Semiconductor device including power-on reset circuit and operating method thereof

Publication Date: 2015.12.01 SK HYNIX INC

AI summary

A semiconductor device includes a power-on reset circuit configured to receive a power voltage and generate a power-on reset signal varying with a voltage level of the power voltage, an internal circuit configured to be initialized and operated in response to the power-on reset signal and generate a hold signal based on an operation mode of the internal circuit, and a reset protection circuit configured to deactivate the power-on reset circuit in response to the hold signal and provide a replacement signal for replacing the power-on reset signal to the internal circuit when the power-on reset circuit is deactivated.