Power-On Reset Circuit With Fast Detection and Accurate Trip Points
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Solution Overview
Problem
Existing power-on detect circuits face challenges in achieving both high speed and high accuracy due to the slow response of bandgap-based detectors and the large variations in trip-points across temperature and process corners in RC-based and CMOS-threshold-based detectors.
Innovation Solution
A power-on reset circuit utilizing a fast comparator instead of an operational amplifier, with a configuration of PNP or NPN transistors and resistors that sets the trip-point based solely on the power supply voltage, ensuring reliable and fast power-up and power-down responses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If bandgap-based power detector is used, then accuracy of trip-point is improved, but response speed deteriorates
Solution Approach 1:
The circuit segments the temperature compensation function from the voltage detection function. The bandgap reference block (R1, R2, R3, Q1, Q2, Q3, op amp 204) separately generates a temperature-compensated reference voltage Vref, while the comparator 104 independently compares V0 with Vref. This segmentation allows the bandgap block to provide accurate trip-point without requiring the comparator to settle slowly, thus resolving the contradiction between accuracy and speed.
Solution Approach 2:
The patent introduces an intermediary voltage V0 obtained by scaling down VDD through resistor divider Ra/Rb. This intermediary voltage serves as the input to the comparator, allowing the comparator to quickly compare against the pre-computed bandgap reference Vref without directly processing the raw supply voltage. This intermediary approach enables fast comparison while maintaining accurate trip-point detection.
2Speed
If RC-based or CMOS-threshold-based power detector is used, then response speed is improved, but accuracy of trip-point deteriorates
Solution Approach 1:
The patent introduces an intermediary voltage V0 obtained by scaling down VDD through resistor divider Ra/Rb. This intermediary voltage serves as the input to the comparator, allowing the comparator to quickly compare against the pre-computed bandgap reference Vref without directly processing the raw supply voltage. This intermediary approach enables fast comparison while maintaining accurate trip-point detection.
3Stability of the object's composition
If bandgap-based power detector is used, then variation across temperature and process corners is improved, but response speed deteriorates
Solution Approach 1:
The circuit segments the temperature compensation function from the voltage detection function. The bandgap reference block (R1, R2, R3, Q1, Q2, Q3, op amp 204) separately generates a temperature-compensated reference voltage Vref, while the comparator 104 independently compares V0 with Vref. This segmentation allows the bandgap block to provide accurate trip-point without requiring the comparator to settle slowly, thus resolving the contradiction between accuracy and speed.
4Speed
If RC-based or CMOS-threshold-based power detector is used, then response speed is improved, but variation across temperature and process corners deteriorates
Solution Approach 1:
The patent introduces an intermediary voltage V0 obtained by scaling down VDD through resistor divider Ra/Rb. This intermediary voltage serves as the input to the comparator, allowing the comparator to quickly compare against the pre-computed bandgap reference Vref without directly processing the raw supply voltage. This intermediary approach enables fast comparison while maintaining accurate trip-point detection.
Data Source
AI summary
A power-on reset circuit includes a first PNP transistor having an emitter, a base, and a collector coupled to ground; a second PNP transistor having an emitter coupled to the base of the first transistor, and a base and collector coupled to ground; a third PNP transistor having an emitter, a base coupled to the base of the first transistor, and a collector coupled to ground; a first resistor coupled between VDD and an internal node; a second resistor coupled between VDD and the emitter of the first transistor; a third resistor coupled between the internal node and the emitter of the third transistor; and a comparator having a first input coupled to the internal node and a second input coupled to the emitter of the first transistor for generating a power-on reset signal.