Power-On Reset Circuit Using Regulated Supply Voltage Detection
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Solution Overview
Problem
Existing power-on reset circuits in semiconductor devices face issues with unreliable reset operations due to varying power supply voltage rise times, leading to premature reset signal transitions before the power supply voltage reaches the desired level.
Innovation Solution
A semiconductor device with a regulator generating a regulated power supply voltage lower than the main power supply voltage, which is used to create a power-on reset signal that transitions from a reset prompt level to a reset release level only after the internal power supply voltage has risen, ensuring reliable reset operations regardless of the power supply voltage rise time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If an RC circuit with fixed delay time is used to generate reset signal, then the circuit structure is simple, but the power-on reset reliability deteriorates when power supply voltage rise time exceeds the delay time
Solution Approach 1:
The patent changes the reference parameter from the fixed RC delay time to the variable power supply voltage rise time. By detecting when the power supply voltage actually reaches its target value, the reset signal timing is dynamically adjusted to match the real power-up process, ensuring reliable reset regardless of how long the voltage takes to stabilize.
Solution Approach 2:
The patent introduces a feedback mechanism where the power supply voltage is continuously monitored and compared against a reference voltage. When the voltage reaches the reference level, this state is fed back to trigger the reset signal transition, creating a closed-loop control that adapts to actual power-up conditions rather than relying on predetermined fixed delays.
2Ease of operation
If the reset signal transitions based on fixed RC delay time, then the circuit operation is simple, but the reset timing becomes inaccurate when power supply voltage rise time varies
Solution Approach 1:
The patent replaces the mechanical/electrical RC timing system with a voltage comparison-based timing system. Instead of relying on the physical charging characteristics of RC components, the system uses voltage detection and comparison circuits to precisely determine when the power supply has reached its target level, achieving accurate timing without complex mechanical or electrical timing networks.
3Reliability
If a longer RC delay time is used to accommodate longer power supply voltage rise time, then the power-on reset reliability improves, but the reset signal remains high for unnecessarily long time causing loss of operational time
Solution Approach 1:
The patent makes the reset signal duration dynamic rather than fixed. The reset signal remains active only until the power supply voltage reaches its target value, at which point the voltage comparison triggers a transition. This dynamic adjustment ensures the reset lasts exactly as long as needed—no more, no less—optimizing both reliability and operational efficiency.
Data Source
AI summary
A semiconductor device and a method of generating a power-on reset signal are provided. The semiconductor device includes a regulator configured to generate a regulated power supply voltage having a lower voltage value than a power supply voltage based on the power supply voltage and output the regulated power supply voltage to an internal power supply line, and a power-on reset circuit configured to generate a signal which has a first level at which reset is prompted immediately after power for the power supply voltage is turned on and which transitions to a second level at which reset release is prompted from the first level when a voltage value of the internal power supply line has risen as a power-on reset signal.