Power Overlay Structure Using Conducting Shims for Thermal Management
Solution Overview
Problem
The existing power overlay (POL) structures using direct bond copper (DBC) substrates face limitations such as material constraints, high manufacturing costs, and inefficiencies in thermal management due to the inherent properties of copper and ceramic materials, which restrict design flexibility and lead to stress issues and voids during the assembly process, especially when dealing with semiconductor devices of varying heights.
Innovation Solution
The proposed solution eliminates the use of DBC substrates by employing conducting shims and a thermal interface layer that includes a thermally conductive, electrically insulating material, allowing for flexible thermal management and accommodating devices of different heights, while reducing manufacturing complexity and costs through a more efficient encapsulation process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If DBC substrate is used for thermal management, then thermal coupling is achieved, but design flexibility is restricted and stress issues occur due to material property limitations
Solution Approach 1:
The patent introduces an underfill material as an intermediary substance between the DBC substrate and semiconductor devices. This underfill material serves as a mediator that accommodates thermal expansion differences and reduces stress while maintaining thermal coupling, thereby resolving the contradiction between achieving thermal management and preserving design flexibility.
Solution Approach 2:
The patent modifies the thermal and mechanical parameters of the assembly by introducing the underfill material, which changes the overall thermal expansion characteristics and stress distribution of the system. This parameter change allows for better adaptation to different device configurations while maintaining effective thermal management.
2Temperature
If DBC substrate is used, then thermal coupling is provided, but manufacturing cost increases and fabrication complexity arises
Solution Approach 1:
The underfill material acts as an intermediary that simplifies the manufacturing process by enabling direct placement of devices onto the DBC substrate without requiring precise pre-alignment of complex interconnect structures. This mediator reduces fabrication complexity and manufacturing cost while maintaining the thermal coupling function of the DBC substrate.
Solution Approach 2:
The underfill material serves as a cost-effective, simple-to-apply substance that replaces expensive and complex alignment fixtures or pre-assembled interconnect structures. Although the underfill itself is a consumable material, it significantly reduces overall manufacturing cost by simplifying the assembly process.
3Adaptability or versatility
If underfill technique is used to apply dielectric filler, then devices of varying heights are accommodated, but assembly time increases and voids may form
Solution Approach 1:
The underfill material exhibits self-leveling and self-filling properties that allow it to automatically accommodate devices of varying heights without requiring manual intervention or complex positioning mechanisms. The material flows into gaps and voids during application, then self-levels to create a planar surface, thereby reducing assembly time while maintaining adaptability to height variations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach provides superior thermal performance, reduces manufacturing costs, and allows for more versatile design options by eliminating the limitations of DBC substrates, enabling effective thermal management and reliable packaging for semiconductor devices of varying heights without the drawbacks of underfill techniques.
Implementation Method 1
a thermal interface layer that includes a thermally conductive, electrically insulating material
Implementation Method 2
a thermal interface layer that includes a thermally conductive, electrically insulating material
Data Source
Figure 1
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AI summary
A semiconductor device module (113) includes a dielectric layer (48), a semiconductor device (44) having a first surface (39) coupled to the dielectric layer (48), and a conducting shim (45) having a first surface (41) coupled to the dielectric layer (48). The semiconductor device (44) also includes an electrically conductive heatspreader (60) having a first surface coupled to a second surface (47) of the semiconductor device (44) and a second surface (49) of the conducting shim (45). A metallization layer (54) is coupled to the first surface (39) of the semiconductor device (44) and the first surface (41) of the conducting shim (45). The metallization layer (47) extends through the dielectric layer (48) and is electrically connected to the second surface (47) of the semiconductor device (44) by way of the conducting shim (45) and the heatspreader (60).