Power semiconductor package comprising a passive electronic component and method for fabricating the same
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional power semiconductor packages face issues with increased leakage inductance and excessive voltage spikes due to separate placement of passive electronic components on printed circuit boards, which also increases complexity and costs, and provide limited space for attaching these components.
Innovation Solution
A power semiconductor package design that integrates passive electronic components directly onto the die pad and external contacts within the package, with encapsulation exposing external contacts, allowing for reduced leakage inductance and voltage spikes by series connection of components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If passive electronic components are provided outside the package on a printed circuit board, then assembly complexity is reduced, but leakage inductance increases and voltage spikes occur
Solution Approach 1:
The patent merges the passive electronic components with the power semiconductor package by providing them on lead posts that are integrated into the package structure. The lead posts extend from the package body and provide mounting surfaces for capacitors and resistors, combining what were previously separate components into a single integrated unit. This eliminates the need for separate PCB mounting while reducing leakage inductance through shorter current paths.
2Object-affected harmful factors
If passive electronic components are integrated into the package, then leakage inductance is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent segments the package into modular components: a package body containing the power semiconductor die, multiple lead posts extending from the package body with internal ledges, and passive components mounted on these lead posts. This segmentation allows each component to be manufactured and prepared separately, then assembled together, reducing overall manufacturing complexity while maintaining the integrated benefits.
Solution Approach 2:
The lead posts are prepared in advance with internal ledges formed on their surfaces during the package manufacturing process. These pre-prepared mounting surfaces allow passive components to be easily attached during final assembly without requiring complex additional processing steps, thus reducing manufacturing complexity while enabling integration.
3Object-affected harmful factors
If passive electronic components are mounted on lead posts within the package, then leakage inductance is reduced, but space for component attachment is limited
Solution Approach 1:
The patent utilizes the vertical dimension by having lead posts extend outward from the package body in the z-direction, with passive components mounted on their external surfaces. This three-dimensional arrangement allows component mounting space to be provided without increasing the footprint area of the package, effectively using vertical space rather than horizontal space to accommodate capacitors and resistors.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A power semiconductor package comprises: a first power semiconductor die arranged on and electrically coupled to a first side of a first die pad, a first passive electronic component comprising a first end and an opposite second end, wherein the first end is arranged on and coupled to the first side of the first die pad and the second end is coupled to an internal ledge of a first external contact, a second passive electronic component connected in series with the first passive electronic component, and an encapsulation encapsulating the first power semiconductor die and the first and second passive electronic components, wherein the first external contact is exposed from a first lateral side of the encapsulation.