Power-Polling Circuit for Memory Storage Power Loss Prediction

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Solution Overview

Problem

Current memory storage apparatus face performance degradation and increased complexity due to power-off recovery algorithms, which divert resources from memory storage operations and require additional storage space, especially when power is suddenly cut off from a host.

Innovation Solution

Incorporating a power management unit and a power-polling time control circuit that senses external power supply levels, predicts power loss, and controls read/write operations to maintain voltage levels within operational ranges, preventing data errors and reducing the need for complex recovery algorithms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If power-off recovery algorithms are implemented in memory storage apparatus, then data safety during power off is improved, but device complexity and resource consumption increase

Engineering Contradiction:
Improvedata safetyVSAvoidfirmware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by implementing a power-polling mechanism that continuously monitors power supply status and predicts potential power loss before it occurs. The controller proactively identifies when power may be cut off and preemptively stops memory operations to prevent data corruption, eliminating the need for complex post-power-loss recovery algorithms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the power monitoring and prediction functionality from the main firmware logic into a dedicated power-polling time control circuit. This separation reduces the complexity of the main firmware by removing the need for extensive power-off recovery algorithms while maintaining data safety through specialized hardware assistance.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If power-off recovery algorithms are executed repeatedly, then data integrity is maintained, but productivity decreases due to resource diversion

Engineering Contradiction:
Improvedata integrityVSAvoidmemory storage operation performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The power-polling time control circuit operates autonomously to monitor power supply status and manage power-off predictions without requiring continuous intervention from the main firmware. This self-service mechanism maintains data integrity through proactive power management while minimizing the computational resources consumed by the memory storage operations.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

By performing power status monitoring and operation stopping in advance through the power-polling mechanism, the system prevents data corruption before it occurs rather than repeatedly executing recovery algorithms after power loss, thereby maintaining data integrity while improving productivity.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If additional storage space is allocated for power-off recovery algorithms, then power loss protection is improved, but available storage capacity decreases

Engineering Contradiction:
Improvepower loss protectionVSAvoidavailable storage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent replaces the traditional firmware-based power-off recovery mechanism with a hardware-assisted power-polling time control circuit. This substitution eliminates the need to store extensive recovery algorithms in memory, thereby preserving available storage capacity while maintaining power loss protection through dedicated hardware functionality.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS7478252B2Power off controllers and memory storage apparatus including a power-polling time control circuit
Publication Date: 2009.01.13 SAMSUNG ELECTRONICS CO LTD
  • US7478252B2 patent drawing
  • US7478252B2 patent drawing
  • US7478252B2 patent drawing

AI summary

Memory storage apparatus include a non-volatile memory for storing data and a power management unit configured to sense a level of an external power supply and to predict a loss of the external power supply. A power-polling time control circuit is configured to control a time when a voltage level sourced from the external power supply is reduced below a predetermined level after loss of the external power supply. A control logic controls read and/or write operations of the non-volatile memory responsive to a prediction of loss of the external power supply from the power management unit.