Power Prediction Model for Voltage Droop Mitigation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current power prediction systems in computing devices suffer from response latency issues when dealing with rapid voltage droops, leading to inefficiencies and performance losses due to the inability to anticipate and mitigate voltage noise effectively.

Innovation Solution

A power prediction model is trained using machine-learning techniques to anticipate current and voltage demand variations, allowing the system to prepare for potential voltage droops ahead of time, thereby reducing response latency and improving mitigation efficacy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If feedback-control based voltage mitigation is used, then voltage droop can be detected and addressed, but response latency causes 3-4 cycles of operation to be lost

Engineering Contradiction:
Improvevoltage mitigation effectivenessVSAvoidresponse latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by using machine learning models to predict voltage droops before they occur. The system analyzes historical workload and voltage data to forecast future voltage conditions, enabling proactive mitigation measures to be taken in advance rather than reacting after the droop occurs, thus eliminating the 3-4 cycle latency penalty of feedback control

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent incorporates feedback mechanisms by continuously monitoring actual voltage droops and comparing them with predicted values. This feedback loop allows the machine learning model to be retrained and refined, improving prediction accuracy over time while maintaining the predictive advantage over traditional feedback-only approaches

Inventive Principle:
Principle #23Feedback

2Reliability

If static margin is increased to tolerate voltage droop, then timing requirements can be met, but power consumption and performance are reduced

Engineering Contradiction:
Improvetiming requirement complianceVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By predicting voltage droops in advance using machine learning, the system can prepare appropriate mitigation strategies before the droop occurs. This allows the system to maintain normal operating performance during predicted droop events rather than relying on conservative static margins that permanently limit performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamic adjustment of system parameters based on predicted voltage conditions. Rather than using fixed static margins, the system dynamically modifies operating parameters in response to predictions, allowing optimal performance during normal conditions while ensuring timing requirements are met during predicted droop events

Inventive Principle:
Principle #15Dynamics

3Reliability

If adaptive-clocking technique is used, then CPU frequency can be relaxed during voltage droop, but response latency of 2-3 CPU cycles is incurred

Engineering Contradiction:
Improvevoltage droop toleranceVSAvoidresponse latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The machine learning model predicts voltage droops before they occur, allowing the system to proactively adjust CPU frequency and other parameters in advance. This eliminates the 2-3 cycle latency of adaptive-clocking by initiating frequency adjustments based on predictions rather than waiting for droop detection

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240095430A1Power Prediction Systems, Circuitry and Methods
Publication Date: 2024.03.21 ARM LTD
  • US20240095430A1 patent drawing
  • US20240095430A1 patent drawing
  • US20240095430A1 patent drawing

AI summary

According to one implementation of the present disclosure, a method includes: receiving, by a hardware design generation circuit, a plurality of input signals of a software workload on a processing unit; training a power prediction model based on a toggling of the input signals accumulated over a training interval range; determining, by the hardware design generation circuit, a plurality of prediction proxies and respective weightings for the plurality of prediction proxies based at least partially on the trained power prediction model, wherein the plurality of weighted prediction proxies correspond to a power output of the hardware design generation circuit; and generating an updated circuit design of the processing unit based on the power output.