Orthogonal Power Rail Notch and Contact Cut for Higher Circuit Density

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Solution Overview

Problem

Existing semiconductor device structures face challenges in achieving high circuit density due to limitations in the placement and connectivity of power rails and source/drain contacts, which hinder efficient power delivery and integration.

Innovation Solution

The formation of a source/drain contact with a first orientation and a perpendicular power rail, incorporating a notch and cut at their intersection, allows for closer alignment and improved connectivity, enabling higher circuit density through orthogonal alignment and direct contact.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If power rails and source/drain contacts are placed in traditional parallel orientations, then manufacturing simplicity is maintained, but circuit density and power delivery efficiency are limited

Engineering Contradiction:
Improvecircuit densityVSAvoidstructural complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent transitions from traditional parallel alignment to orthogonal (perpendicular) alignment between power rails and source/drain contacts, utilizing a second dimension of spatial arrangement. This dimensional change enables closer placement and improved power delivery efficiency without significantly increasing manufacturing complexity, as the orthogonal configuration can be achieved through standard lithographic patterning processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If power rails are placed closer to contact ends, then power delivery efficiency improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvepower delivery efficiencyVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent incorporates notches in the power rails and corresponding cuts in the source/drain contacts during the formation process, before final alignment. These preliminary structural modifications create predetermined alignment features that guide the placement of power rails relative to contact ends, enabling closer spacing while maintaining manufacturability through self-alignment mechanisms rather than requiring high-precision post-fabrication adjustment.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If orthogonal alignment is used between power rails and contacts, then circuit density improves, but manufacturing process complexity increases

Engineering Contradiction:
Improvecircuit densityVSAvoidfabrication ease
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent combines the formation of orthogonal power rails and source/drain contacts into a unified fabrication process flow. By integrating the orthogonal patterning steps with existing lithographic and etching processes, and by combining the notch formation in power rails with contact cut formation, the patent achieves high circuit density while avoiding the need for separate, complex alignment and fabrication steps that would otherwise be required.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250285973A1Source/drain contact cut and power rail notch
Publication Date: 2025.09.11 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20250285973A1 patent drawing
  • US20250285973A1 patent drawing

AI summary

Embodiments of the invention include a method for fabricating a device and the resulting structure. A transistor source/drain contact is formed in a first orientation. A power rail is formed on the transistor source/drain contact in a second orientation, where the second orientation is perpendicular to the first orientation. A hardmask is formed. The hardmask is patterned to expose a location of an intersection of the power rail and the transistor source/drain contact. The location unprotected by the hardmask is etched to create a cut passing through the power rail and the transistor source/drain contact.