Configurable Power Rail Start-Up Sequencing for Current Distribution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing power supply start-up mechanisms lack flexibility and are costly, as they often require fixed timing sequences that do not adapt to different environmental needs, and they are not optimized for efficient current distribution across multiple power-consuming circuits.
Innovation Solution
A power supply start-up sequencing mechanism using a time value generator and logic circuits with associated start timing values, allowing for flexible and low-cost activation of power supply circuits, where each logic circuit receives a time value signal and provides an activation signal when the signal matches its assigned start timing value, stored in non-volatile memory, enabling independent start-up timing for each circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If fixed delay timing is used between power supply switching on, then power supply sequencing is achieved, but adaptability to different environments is reduced
Solution Approach 1:
The patent applies dynamics by making the timing values configurable rather than fixed. Each power supply circuit has an associated timing value that can be set to different values depending on the operating environment, allowing the system to adapt dynamically to different sequencing requirements without changing the hardware architecture.
Solution Approach 2:
The patent changes the parameter of timing delay from a fixed physical value to a configurable parameter. By allowing the timing values to be set to different values (e.g., through registers or configuration memory), the system can adapt to different environments by simply changing these parameters without modifying the circuit structure.
2Area of stationary object
If external capacitors and resistors are used to determine switching interval, then timing control is achieved, but device area increases
Solution Approach 1:
The patent replaces the mechanical/electrical timing system (external capacitors and resistors) with a digital logic-based timing system. Instead of using RC time constants determined by physical components, the timing is controlled by digital counters and configurable timing values, significantly reducing the required silicon area while maintaining or improving flexibility.
Solution Approach 2:
The patent creates a universal timing control mechanism that can serve multiple power supply circuits with different timing requirements using a single integrated structure. The configurable timing values allow the same hardware to adapt to different sequencing scenarios, making the system multi-functional without requiring separate timing circuits for each power supply.
3Productivity
If sequenced start-up of power supplies is implemented, then current overload is prevented, but startup time increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring timing values for each power supply circuit before the actual sequencing operation begins. The timing values are determined in advance based on the required sequencing order and delays, allowing the system to execute the power-up sequence efficiently without real-time calculation or adjustment, thus maintaining fast startup while ensuring reliable current distribution.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A power supply start-up sequencing mechanism for controlling activation of a plurality of power supply circuits with a predetermined timing is disclosed. The mechanism comprises a time value generator arranged to provide a time value signal; and for each of the power supply circuits, a logic circuit arranged to receive the time value signal and from the received signal provide an activation signal to the respective power supply circuit, wherein the respective logic circuit is associated with a start timing value for the respective power supply circuit such that the activation signal is provided when the associated start timing value coincides with the received time value signal. An apparatus comprising such a mechanism, and a method for controlling activation of a plurality of power supply circuits are also disclosed.