Power Regulator Circuit for Fast Startup and Low Overshoot
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Solution Overview
Problem
Existing power regulator circuits face challenges in achieving fast transient response and reduced overshoot during startup and load changes, as they often require additional time for bias currents to stabilize, leading to increased complexity and slower response times.
Innovation Solution
The implementation of a power regulator circuit with a first and second source follower input stage and a common gate differential gain stage, which allows for simultaneous startup with the reference voltage, reducing overshoot and enabling fast transient response by controlling output voltage through drive signals and bias currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional power regulator circuits are used, then the circuit can maintain regulated output voltage, but the startup time is slow and transient response is delayed due to bias current stabilization requirements
Solution Approach 1:
The patent applies preliminary action by pre-establishing bias current paths through the source follower input stages before the main regulation loop becomes active. The source follower stages (Q1, Q2) are configured to immediately establish gate voltages in response to reference and feedback voltages, preparing the differential gain stage for instant operation upon power application, thereby eliminating startup delay.
Solution Approach 2:
The patent implements dynamics by using source follower input stages that dynamically respond to voltage changes without requiring current stabilization time. The source follower configuration allows the circuit to adapt its operating point instantaneously by following voltage transitions, enabling fast transient response when load conditions change or during startup.
2Speed
If additional circuit components are added to improve transient response, then the response speed increases, but the device complexity increases
Solution Approach 1:
The patent applies universality by designing the source follower input stages to perform multiple functions: they provide bias current establishment, voltage following, differential signal generation, and transient response enhancement all within the same circuit topology. This multi-functionality achieves fast transient response without adding separate dedicated components for each function.
Solution Approach 2:
The patent merges the bias generation function and the signal amplification function into a single integrated differential gain stage with source follower inputs. Instead of having separate bias circuits and amplification stages that would increase complexity, the design combines these functions so that the same transistors perform both bias establishment and transient response enhancement.
3Loss of time
If fast transient response is achieved through conventional means, then the response time decreases, but quiescent current consumption increases
Solution Approach 1:
The patent applies parameter changes by utilizing the voltage-controlled nature of source follower stages, which change their operating parameters (gate voltage, drain current) in response to input voltage changes rather than requiring fixed bias currents. This allows the circuit to achieve fast transient response by modulating voltage parameters rather than increasing current parameters, thereby reducing quiescent current consumption.
Data Source
AI summary
An example circuit includes a first source follower input stage having a reference voltage input and a first output. A second source follower input stage has a feedback voltage input and a second output, in which second source follower input stage is configured to receive a feedback voltage at the feedback voltage input. The feedback voltage is representative of an output voltage at an output terminal of the circuit. A common gate differential gain stage has first and second differential inputs and first and second drive outputs. The first differential input is coupled to the first output, and the second differential input is coupled to the second output. The common gate differential gain stage is configured to control the output voltage at the output terminal by controlling at least one of the first or second drive outputs.