Power-On Reset Circuit for Stable Band-Gap Startup
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Solution Overview
Problem
Existing power-on reset circuits face errors due to the instability of band-gap reference circuits during the power-on process, leading to unreliable chip startups.
Innovation Solution
A power-on reset circuit design that includes a band-gap reference circuit, a current comparator, and a voltage comparison circuit, where the current comparator and voltage comparison circuit are powered by a voltage source, ensuring the band-gap reference circuit reaches stable voltage thresholds before outputting a reset signal, thereby preventing false triggers and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the power-on reset circuit outputs a reset signal when the power supply voltage reaches a preset value, then the chip can start to work, but the band-gap reference circuit may not be stable yet causing errors and failure to start normally
Solution Approach 1:
The patent introduces a startup control circuit that activates the band-gap reference circuit before comparing the power supply voltage with the reference voltage. This preliminary action ensures the band-gap reference circuit has time to stabilize and output an accurate reference voltage before the comparison occurs, preventing startup errors while maintaining efficient startup speed.
2Reliability
If the band-gap reference circuit is used to provide stable voltage, then temperature influence on voltage is reduced, but the band-gap reference circuit takes time to stabilize causing delayed reset signal output
Solution Approach 1:
The startup control circuit is designed to activate the band-gap reference circuit in advance during the power-on process. This preliminary activation gives the band-gap reference circuit sufficient time to stabilize and provide an accurate reference voltage before the voltage comparison is performed, ensuring voltage stability without excessive delay.
Solution Approach 2:
The patent implements a dynamic control mechanism where the startup control circuit monitors the power-on state and dynamically adjusts the activation timing of the band-gap reference circuit. This dynamic approach optimizes the balance between stabilization time and startup speed, ensuring the reference circuit is ready just in time for the voltage comparison.
3Device complexity
If the power supply voltage is monitored directly for reset signal generation, then the circuit complexity is reduced, but temperature-induced voltage variations cause false reset signals
Solution Approach 1:
The patent introduces a band-gap reference circuit as an intermediary element that generates a temperature-compensated reference voltage. This reference voltage serves as a stable benchmark for comparing the power supply voltage, eliminating false reset signals caused by temperature-induced voltage variations while maintaining relatively simple circuit architecture.
Data Source
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AI summary
Embodiments of the present disclosure provide a power-on reset circuit, including: a band-gap reference circuit, a current comparator, and a voltage comparison circuit, the band-gap reference circuit, the current comparator, and the voltage comparison circuit being powered by a voltage source; where a first output terminal of the band-gap reference circuit is connected to a control terminal of the current comparator; a first current input terminal of the current comparator receives a first current signal, a second current input terminal of the current comparator receives a second current signal, and an output terminal of the current comparator is connected to a control terminal of the voltage comparison circuit; and a first input terminal of the voltage comparison circuit is connected to the first output terminal of the band-gap reference circuit, a second input terminal of the voltage comparison circuit receives a signal indicating a voltage value of the voltage source, and an output terminal of the voltage comparison circuit is used to output a reset signal, thereby avoiding occurrence of an error caused by output of the reset signal when the reference generating circuit is unstable, reducing false trigger during the power-on process, and increasing the power-on reliability.