Power-On Reset Circuit Stabilization Against Supply Noise Glitches
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Solution Overview
Problem
Semiconductor apparatuses experience malfunctions due to glitches in power-on reset signals caused by noise in the power supply voltage, leading to unstable enabling and disabling of the power-on reset signal during power-up and power-down operations.
Innovation Solution
A power-on reset signal generating device comprising a reference voltage generator, a signal driver, and a stabilization circuit that maintains the power-on reset signal enabled or disabled for a predetermined time, regardless of voltage fluctuations, using a feedback mechanism to stabilize the power-on reference voltage and prevent glitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the power-on reset signal is generated based on the power supply voltage level detection, then the semiconductor apparatus can initialize internal circuits and prepare for normal operation, but the noise in the power supply voltage causes the power-on reset signal to glitch and become unstable during power-up and power-down operations
Solution Approach 1:
The patent introduces an intermediate voltage level (first voltage level between powered-off and powered-on states, and second voltage level between normal and over-voltage states) that acts as a buffer zone. This intermediary voltage level prevents direct transition between extreme states, thereby eliminating glitches caused by noise during power supply voltage fluctuations.
Solution Approach 2:
The patent establishes predetermined voltage levels and hysteresis margins before actual transitions occur. By setting the first voltage level higher than the minimum operating voltage and the second voltage level lower than the maximum safe voltage, the system creates a cushioning effect that absorbs noise-induced fluctuations and prevents unwanted signal transitions.
2Speed
If the power-on reset signal transitions rapidly in response to power supply voltage changes, then the response time is reduced, but voltage noise causes iterative enabling and disabling of the signal leading to malfunctions
Solution Approach 1:
The patent implements a feedback mechanism where the power-on reset signal generation is continuously monitored against predetermined voltage levels. The hysteresis comparator provides feedback that maintains the signal state until the voltage clearly crosses the threshold, preventing rapid toggling due to noise while maintaining responsive behavior for genuine voltage transitions.
Solution Approach 2:
By establishing voltage margins (first voltage level above minimum, second voltage level below maximum) before transitions occur, the system cushions against noise-induced premature transitions. This allows rapid response to genuine voltage changes while filtering out noise during the cushioning zone.
Data Source
AI summary
A power-on reset signal generating device includes a reference voltage generator, a signal driver, and a stabilization circuit. The reference voltage generator generates a power-on reference voltage based on a voltage level of a power supply voltage. The signal driver drives the power-on reference voltage to generate a power-on reset signal. The stabilization circuit receives the power-on reset signal to keep a voltage level of the power-on reference voltage staying during a predetermined amount of time.