Power Semiconductor Device Buffer Insulating Film
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Solution Overview
Problem
Power semiconductor devices face damage during electrical connection due to miniaturization and variations in via diameters, leading to unstable energization and difficulty in handling large electric power.
Innovation Solution
A power semiconductor device design featuring a semiconductor layer, gate electrode, gate insulating film, conductor portion, interlayer insulating film, buffer insulating film, and electrode layer, where the buffer insulating film mitigates impact and prevents current concentration by covering a partial region and being located under the pad portion, thereby reducing damage and ensuring stable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding is performed for electrical connection to the pad, then electrical connection is achieved, but the semiconductor layer may be damaged by impact at the portion immediately below the pad
Solution Approach 1:
The patent introduces a buffer insulating film as an intermediary layer between the semiconductor layer and the pad. This buffer layer absorbs and distributes the impact force during wire bonding, preventing direct transmission of mechanical stress to the semiconductor layer while maintaining electrical connection functionality through the pad structure.
Solution Approach 2:
The buffer insulating film is formed in advance during the manufacturing process, positioned to cover the semiconductor layer region that will be subjected to impact during subsequent wire bonding operations. This preemptive cushioning structure prevents damage before the harmful impact occurs during electrical connection.
2Reliability
If multiple vias with different diameters are used for electrical connection, then connection paths are provided, but more patternings are required leading to pattern defects and variations
Solution Approach 1:
The patent applies local quality by forming the buffer insulating film selectively at specific locations where impact protection is needed, rather than uniformly across the entire device. This localized approach provides necessary protection while minimizing additional manufacturing complexity and maintaining overall pattern precision.
Data Source
AI summary
A gate electrode is provided for controlling a current flowing through a semiconductor layer. A gate insulating film electrically insulates the semiconductor layer and the gate electrode from each other. A conductor portion is provided on the semiconductor layer, and electrically connected with the semiconductor layer. An interlayer insulating film is provided on the gate electrode such that the conductor portion is electrically insulated from the gate electrode. A buffer insulating film covers a partial region on the conductor portion and the interlayer insulating film, and is made of an insulator. An electrode layer has a wiring portion located on a region from which the conductor portion is exposed, and a pad portion located on the buffer insulating film. Thereby, damage to an IGBT caused when a wire is connected to the pad portion can be suppressed. Further, larger electric power can be handled, while preventing occurrence of breakage due to current concentration.