Power Semiconductor Contact Elements for High Voltage Creepage
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Solution Overview
Problem
Existing methods for manufacturing power semiconductor chips with vertical structures face challenges in effectively managing creepage currents and ensuring electrical strength, particularly when high voltages are applied between electrodes, due to the limited distance between external contact elements.
Innovation Solution
The solution involves a leadframe structure with contact elements extending orthogonally to the carrier plane, where the height of these elements is significantly longer than the side face height, reducing creepage currents and enhancing electrical strength by maximizing the distance between external contact elements of the drain and source electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact elements are arranged in a conventional planar configuration on the carrier, then the device structure remains simple, but the distance between external contact elements is limited, resulting in insufficient electrical strength and inability to withstand high voltages
Solution Approach 1:
The patent transitions from a conventional planar (2D) arrangement of contact elements on the carrier to a three-dimensional configuration where contact elements extend vertically from the carrier plane. This dimensional change increases the distance between contact elements of different potentials, thereby enhancing electrical strength and creepage performance without requiring a larger footprint area.
Solution Approach 2:
The contact elements are designed with asymmetric positioning and varying heights relative to the carrier plane. By strategically placing contact elements at different vertical levels and horizontal positions, the patent maximizes the creepage distance between high-voltage and low-voltage contacts while optimizing the overall device structure.
2Object-affected harmful factors
If the distance between external contact elements is increased to reduce creepage currents, then electrical strength improves, but the device footprint and complexity increase
Solution Approach 1:
By extending contact elements vertically from the carrier plane at different heights, the patent creates additional spatial separation between contacts without increasing the horizontal footprint. This vertical dimensionality allows for reduced creepage currents while maintaining a compact device footprint.
Solution Approach 2:
The patent employs curved or angled configurations of contact elements rather than straight vertical extensions. This curvature optimizes the creepage path length between contacts while minimizing the horizontal space required, effectively reducing creepage currents without proportionally increasing the device footprint.
Data Source
AI summary
An electronic device and manufacturing thereof. One embodiment provides a carrier and multiple contact elements. The carrier defines a first plane. A power semiconductor chip is attached to the carrier. A body is formed of an electrically insulating material covering the power semiconductor chip. The body defines a second plane parallel to the first plane and side faces extends from the first plane to the second plane. At least one of the multiple contact elements has a cross section in a direction orthogonal to the first plane that is longer than 60% of the distance between the first plane and the second plane.