Power Semiconductor Device Coplanar Electrode Alignment
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Solution Overview
Problem
Existing power semiconductor devices face challenges with expensive metal can packaging, difficulty in adjusting electrodes for surface mounting, and varying semiconductor chip thickness, which affects heat dissipation and electrical performance.
Innovation Solution
A power semiconductor device is developed using a mirror lead frame unit with semiconductor chips attached to die paddles, where metal bumps are deposited and flattened to create a flat top surface, allowing for secure bonding and coplanar alignment with leads, and subsequently covered by a plastic packaging layer for improved heat dissipation and mounting compatibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If metal can packaging is used for power semiconductor devices, then heat dissipation is improved, but production cost increases
Solution Approach 1:
The patent replaces expensive metal can packaging with a plastic packaging structure that achieves comparable heat dissipation performance at lower cost. The plastic package incorporates thermal management features such as thermal vias and heat sinks integrated into the packaging structure, eliminating the need for costly metal cans while maintaining effective heat dissipation.
Solution Approach 2:
The patent employs composite packaging materials combining plastic with thermal conductive elements. The plastic package integrates thermal vias filled with conductive material and heat sink structures, creating a composite structure that provides both mechanical protection and effective heat dissipation without requiring pure metal construction.
2Reliability
If electrodes are fixed on semiconductor chip, then electrical connection is established, but adjustment for surface mounting becomes difficult
Solution Approach 1:
The patent separates the electrode functions by providing dedicated bonding pads on the semiconductor chip for electrical connection and separate protruding electrodes on the packaging structure for mechanical mounting. This segmentation allows the bonding pads to remain fixed for reliable electrical connection while the protruding electrodes can be positioned and adjusted independently for proper surface mounting alignment.
Solution Approach 2:
The patent introduces the packaging structure as an intermediary between the semiconductor chip and the mounting surface. The packaging structure contains protruding electrodes that extend from the package body, serving as adjustable mechanical contact points for surface mounting while the chip's bonding pads remain fixed for electrical connection. This intermediary layer decouples the electrical and mechanical connection requirements.
3Adaptability or versatility
If varying semiconductor chip thickness is used, then design flexibility is increased, but electrode alignment and heat dissipation consistency deteriorate
Solution Approach 1:
The patent incorporates preliminary compensation features in the packaging structure, including adjustable protruding electrodes and compliant mounting structures, that pre-accommodate variations in chip thickness before mounting. This preliminary action allows the packaging to absorb thickness variations without affecting the final alignment of mounting electrodes or the consistency of heat dissipation pathways.
Solution Approach 2:
The patent employs adjustable parameters in the packaging structure, such as the position and height of protruding electrodes, and compliant mounting features that can adapt to different chip thicknesses. By making these parameters adjustable rather than fixed, the packaging structure maintains consistent electrode alignment and heat dissipation performance across chips with varying thicknesses.
Data Source
AI summary
A preparation method for a power semiconductor device includes: providing a lead frame containing a plurality of chip mounting units, one side edge of a die paddle of each chip mounting unit is bent and extended upwardly and one lead connects to the bent side edge of the die paddle and extends in an opposite direction from the die paddle; attaching a semiconductor chip to the top surface of the die paddle; forming metal bumps on each electrode at the front of the semiconductor chip with a top end of each metal bump protruding out of a plane of the top surface of the lead; heating the metal bump and pressing a top end of each metal bump by a pressing plate forming a flat top end surface that is flush with the top surface of the lead; and cutting the lead frame to separate individual chip mounting units.