Power Semiconductor Device with Leadframe-Mounted Capacitor
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Solution Overview
Problem
Conventional power semiconductor devices require discrete capacitors arranged on carriers, leading to high costs, space inefficiency, and limited flexibility in mounting capacitors near integrated circuits, which affects their efficacy and efficiency.
Innovation Solution
A power semiconductor device design featuring a leadframe with chip carrier parts and external leads, allowing a capacitor to be mounted directly on adjacent leads, reducing space requirements and enhancing efficiency by positioning the capacitor close to integrated circuits, and using a plastic compound for mechanical and electrical protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete capacitor components are arranged on the carrier in SMD design, then the capacitors can be electrically connected to the integrated circuits, but the space requirement increases and the capacitors cannot be mounted arbitrarily near to the integrated circuits
Solution Approach 1:
The patent merges the capacitor with the leadframe structure by integrating the capacitor onto the carrier substrate that already supports the integrated circuits. This consolidation eliminates the need for separate discrete capacitor components and their associated mounting space, directly resolving the contradiction between electrical connection reliability and space requirement.
Solution Approach 2:
The patent utilizes the vertical dimension by mounting the capacitor on the carrier substrate in a three-dimensional arrangement rather than a flat two-dimensional layout. This allows the capacitor to be positioned in close proximity to the integrated circuits without increasing the planar footprint, effectively resolving the space constraint while maintaining electrical connectivity.
2Reliability
If discrete capacitor components are arranged on the carrier, then the capacitors can provide decoupling function, but the cost and space expenditure increase
Solution Approach 1:
The patent combines the capacitor function with the existing leadframe and carrier structure, eliminating the need for separate discrete capacitor components. This integration reduces both the component count and the associated manufacturing costs while maintaining the decoupling function, directly addressing the contradiction between functional reliability and manufacturing ease.
Solution Approach 2:
The carrier substrate serves multiple functions: it supports the integrated circuits, provides electrical connections, and integrates the capacitor for decoupling. This multi-functionality eliminates the need for separate discrete components, reducing both cost and space expenditure while maintaining the necessary decoupling function.
3Area of stationary object
If the capacitor is mounted on two adjacent external leads, then the space requirement is reduced and the capacitor can be positioned near the integrated circuits, but the manufacturing complexity increases
Solution Approach 1:
The capacitor is pre-mounted on the carrier substrate during the leadframe fabrication process, before the integrated circuits are installed. This preliminary action simplifies the overall manufacturing process by eliminating subsequent mounting steps and reducing assembly complexity, while achieving the space-saving benefit of close capacitor-to-IC positioning.
Data Source
AI summary
A power semiconductor device is provided. The power semiconductor device includes a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads, and a capacitor. The capacitor is mounted on two adjacent external leads.